EPC16UI88N vs EPC16UI88 比較
詳細並排比較 EPC16UI88N 由 Intel 與 EPC16UI88 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC16UI88N | EPC16UI88 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | Memory ICs | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| 記憶體類型 | In-System Programmable Configuration PROM | — |
| 記憶體容量 | 16 Mbit (2 Mbyte) | — |
| Programmable Type | In System Programmable | — |
| Supply Voltage - Operating | 3.3 V | — |
| Supply Voltage Range | 2.25 V to 6 V (per GlobalSpec) | — |
| Configuration Clock Frequency | 66.7 MHz max | — |
| 工作溫度 | -40 C to +85 C (Industrial) | -40C to +85C (industrial) |
| 封裝 / 外殼 | 88-UBGA / UFBGA (11 mm x 8 mm) | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Family | EPC16 | — |
| 介面 | Serial / JTAG (IEEE 1149.1) | — |
| Number of Terminals | 88 | — |
| Package Code | FBGA | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance status] | Compliant |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Memory Density | — | 16 Mb (2 MB) |
| Configuration Interface | — | Altera Passive Serial / Passive Parallel (Sync & Async) / JTAG |
| Core Supply Voltage | — | 3.3 V |
| Programming Interface | — | IEEE 1149.1 JTAG (in-system programmable) |
| Maximum Configuration Clock | — | 100 MHz |
| Cascading Support | — | Multi-device configuration chains |
| Supported FPGA Families | — | Altera Cyclone II/III/IV, Stratix II/III, APEX II |
| 封裝 | — | 88-ball UBGA (Ultra FineLine BGA), 11x8 mm |
| Standby Current | — | [DATA_NEEDED: standby current] |
| Active Configuration Current | — | [DATA_NEEDED: active configuration current] |
| Programming Cycles | — | [DATA_NEEDED: programming endurance cycles] |
| Configuration Time | — | [DATA_NEEDED: configuration time for typical 16 Mb bitstream] |