EPC18QI100 vs EPC16QC100 比較
詳細並排比較 EPC18QI100 由 Altera 與 EPC16QC100 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC18QI100 | EPC16QC100 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | Memory ICs | Memory ICs |
| 生命週期狀態 | Obsolete | Obsolete |
| Manufacturer | Altera (now Intel Programmable Solutions Group) | — |
| Device Type | FPGA Configuration PROM (nonvolatile) | — |
| Memory Density | 18 Mbit (18,874,368 bits) | — |
| Configuration Interface | Altera serial (DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE) | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V or 5 V tolerant | — |
| Programming Interface | JTAG (IEEE 1149.1) in-system programmable | — |
| Cascading Support | Yes (via nCASC pin, multi-device chains supported) | — |
| 封裝 | 100-pin PQFP (Plastic Quad Flat Pack) | 100-pin PQFP (20 x 14 mm) |
| Package Dimensions | 14 mm x 20 mm x 1.4 mm (body) / 3.4 mm (overall incl. leads) | — |
| 工作溫度範圍 | -40 C to +85 C (industrial) | — |
| 安裝類型 | Surface Mount | Surface Mount |
| MSL 等級 | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| Lead Finish | Matte tin (lead-free, per Altera Pb-free roadmap) | — |
| RoHS 狀態 | Compliant (Pb-free part marking) | [DATA_NEEDED: RoHS status] |
| Configuration Time | [DATA_NEEDED: configuration time at typical DCLK] | — |
| End-of-Life Status | Obsolete; replaced by Altera/Intel EPCQ family | — |
| 記憶體類型 | — | Flash Configuration PROM (non-volatile) |
| 記憶體容量 | — | 16 Mbit |
| Configuration Clock (max) | — | 33 MHz |
| 介面 | — | Altera enhanced configuration serial interface |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Supply Voltage (VCC) | — | 3.0 V to 3.6 V |
| 工作溫度 | — | -40C to +85C (commercial) |
| Cascadable | — | Yes (multi-device chain) |
| Compression Support | — | Yes (Altera enhanced compression) |
| Supported FPGA Families | — | Stratix, APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K |
| Configuration Controller | — | Integrated on-die |