EPC1L20 vs EPC1LC120 比較
詳細並排比較 EPC1L20 由 Altera 與 EPC1LC120 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC1L20 | EPC1LC120 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | Memory ICs | Memory ICs |
| 生命週期狀態 | 啟用中 | 啟用中 |
| 記憶體類型 | OTP Configuration PROM (Flash) | Serial Configuration Memory (Flash-based, non-volatile) |
| 記憶體容量 | 1 Mbit | — |
| Configuration Clock (max) | 8 MHz | — |
| Flash Access Time | 90 ns (approx.) | — |
| Max Read Bandwidth | 160 Mbps (16-bit DQ bus) | — |
| 介面 | Serial / FPP configuration + JTAG (IEEE 1149.1) | Altera / Intel proprietary FPGA-configuration serial bus (DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE) |
| 供應電壓 | 3.3 V (typical) | [DATA_NEEDED: VCC range] |
| Programmability | One-Time Programmable (OTP) | — |
| 封裝 | 20-pin PLCC (9x9 mm) | LQFP-120 (Low-profile Quad Flat Pack) |
| 安裝類型 | Through-Hole / Socket | Surface Mount |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | — |
| JTAG / ISP Support | Yes (IEEE 1149.1) | — |
| Compatible FPGA Series | Stratix, Cyclone, APEX, FLEX, ACEX, LUT-based families | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free status] |
| Memory Density | — | 1 Mbit |
| Serial Clock Frequency (DCLK) | — | 8 MHz |
| Supported FPGA Families | — | APEX 20K, ACEX 1K, Cyclone, MAX, Mercury, Stratix-class |
| 工作溫度範圍 | — | [DATA_NEEDED: operating temperature range] |
| Programming | — | Factory / JTAG via Altera programming tools |
| MSL 等級 | — | [DATA_NEEDED: MSL rating] |
| Configuration Mode | — | Serial configuration of SRAM-based FPGAs |
| Compatible Bitstream Width | — | Serial |