EPC1LC20 vs EPC1LC120 比較
詳細並排比較 EPC1LC20 由 Intel 與 EPC1LC120 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC1LC20 | EPC1LC120 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | Memory ICs | Memory ICs |
| 生命週期狀態 | Obsolete | 啟用中 |
| 記憶體類型 | Non-volatile configuration memory (Flash/EPROM) | Serial Configuration Memory (Flash-based, non-volatile) |
| Memory Capacity | 1 Mbit (1,048,576 bits) | — |
| 介面類型 | Serial configuration interface | — |
| Maximum DCLK Frequency | 8 MHz | — |
| 供應電壓 | 3.3 V or 5.0 V | [DATA_NEEDED: VCC range] |
| In-System Programmability | Yes (IEEE 1149.1 / JTAG) | — |
| Programmable Voltage | 5.0 V and 3.3 V ISP | — |
| Configuration Mode | Serial, multi-device daisy-chain capable | Serial configuration of SRAM-based FPGAs |
| 封裝 | 20-pin PLCC (J-leaded, surface mount) | LQFP-120 (Low-profile Quad Flat Pack) |
| 腳位數 | 20 | — |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | [DATA_NEEDED: Operating temperature range] | — |
| Compatible FPGA Families | ACEX 1K, APEX 20K, FLEX 10K, Cyclone, Mercury | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| JTAG Pins | TCK, TMS, TDI, TDO | — |
| Memory Density | — | 1 Mbit |
| Serial Clock Frequency (DCLK) | — | 8 MHz |
| Supported FPGA Families | — | APEX 20K, ACEX 1K, Cyclone, MAX, Mercury, Stratix-class |
| 介面 | — | Altera / Intel proprietary FPGA-configuration serial bus (DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE) |
| 工作溫度範圍 | — | [DATA_NEEDED: operating temperature range] |
| Programming | — | Factory / JTAG via Altera programming tools |
| MSL 等級 | — | [DATA_NEEDED: MSL rating] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Compatible Bitstream Width | — | Serial |