EPC1PC8N vs EPC1PC8CEC 比較
詳細並排比較 EPC1PC8N 由 Intel 與 EPC1PC8CEC 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC1PC8N | EPC1PC8CEC |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | Memory ICs | Memory ICs |
| 生命週期狀態 | Obsolete | Obsolete |
| 記憶體類型 | OTP (One-Time Programmable) Configuration PROM | OTP Configuration PROM (non-volatile) |
| 記憶體容量 | 1 Mbit | 1 Mbit (1,046,496 bits) |
| 組織 | Serial (DCLK + DATA) | 1,046,496 x 1 bit (serial) |
| 供應電壓 | 3.0 V to 3.6 V | — |
| Supply Voltage (Typical) | 3.3 V | — |
| 介面 | Altera PS Serial / JTAG (IEEE 1149.1) | — |
| Programmability | In-system via JTAG; OTP after programming | — |
| Standby Current | [DATA_NEEDED: standby current uA] | — |
| Active Current | [DATA_NEEDED: active current mA] | — |
| 工作溫度 | [DATA_NEEDED: operating temperature range C] | -40 C to +85 C (industrial, suffix CEC) |
| 封裝 | 8-pin PDIP (PC8N suffix) | 8-pin PDIP (300-mil, through-hole) |
| 安裝類型 | Through-Hole | — |
| RoHS 狀態 | Compliant (PC8N suffix indicates lead-free) | [DATA_NEEDED: RoHS compliance status] |
| Configuration Mode | Serial (PS mode) | — |
| JTAG Compliance | IEEE Std. 1149.1-1990 boundary-scan | — |
| Configuration Interface | — | Altera serial (DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE) |
| Supply Voltage VCC | — | 3.0 V to 3.6 V (3.3 V typical) |
| Programming Method | — | Factory OTP (one-time programmable) |
| Cascadable | — | Yes (nCASC pin for multi-PROM chains) |
| JTAG Boundary Scan | — | Yes |
| Technology | — | CMOS EPROM cell |
| Compatible FPGA Families | — | FLEX 10K, APEX, ACEX, Cyclone, MAX (Altera / Intel FPGA) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| MSL 等級 | — | [DATA_NEEDED: MSL rating] |