EPC1TI32 vs EPC2LI20 比較

詳細並排比較 EPC1TI32 由 Altera 與 EPC2LI20 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC1TI32 EPC2LI20
品牌 Altera Altera
類別 Memory ICs Memory ICs
生命週期狀態 Obsolete NRND
記憶體類型 FPGA Configuration PROM (Serial, OTP) Flash (in-system programmable)
Memory Density 1 Mbit (1,046,496 bits) —
介面 Altera 4-pin serial (DCLK, DATA, nCONFIG, nSTATUS) —
Programming Interface JTAG (IEEE 1149.1) —
供應電壓 3.3 V (derived from VCCIO of target FPGA) —
封裝 32-pin TQFP (7 x 7 mm) —
安裝類型 Surface Mount Surface Mount (PLCC socket-compatible)
工作溫度 -40 C to +85 C (industrial) -40 C to +85 C (Industrial)
Compatible FPGAs ACEX 1K, FLEX 10K, FLEX 6000, MAX 9000 —
Replacement For EPC1064, EPC1441 —
Configuration Software Quartus II, MAX+PLUS II —
Programming Hardware MasterBlaster / ByteBlasterMV / USB-Blaster —
RoHS 狀態 [DATA_NEEDED: rohs status from datasheet] [DATA_NEEDED: RoHS status]
Lead-Free [DATA_NEEDED: lead-free status] —
MSL 等級 [DATA_NEEDED: MSL level] [DATA_NEEDED: MSL level]
記憶體容量 — 1.6 Mb (1,572,864 bits)
Programmable Type — In System Programmable (ISP)
功能 — Configuration PROM for SRAM-based FPGAs
Supply Voltage - Operating — 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing)
封裝 / 外殼 — 20-PLCC (J-lead, 9x9 mm)
Configuration Interface — Serial or Byte-wide (parallel)
Decompression — On-chip (supports compressed bitstreams)
JTAG / ISP Interface — IEEE 1532 (TCK, TMS, TDI, TDO)
Multi-Device Support — Yes (daisy-chain configuration)
User-Accessible Memory — Yes (unused flash available to user logic)

資料表與資源

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