EPC20LI20N vs EPC1LI20N 比較

詳細並排比較 EPC20LI20N 由 Intel 與 EPC1LI20N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EPC1LI20N EPC1LI20N - 1Mb OTP FPGA Configuration PROM | Altera

EPC1LI20N - 1Mb OTP FPGA Configuration PROM | Altera

EPC1LI20N ⚠ 最後購買機會

規格比較

參數 EPC20LI20N EPC1LI20N
品牌 Intel Altera
類別 FPGA & CPLD Memory ICs
生命週期狀態 NRND 最後購買
單價 (USD) — $7.80
記憶體類型 EPROM (UV-erasable, in-system programmable) OTP Configuration PROM (One-Time Programmable)
記憶體容量 1.6 Mbit (65,536 x 1-bit words, approx. 200 Kbyte) 1 Mbit (1,048,576 bits)
介面 Serial (4-pin Altera Passive Serial: DCLK, DATA0, nCONFIG, nSTATUS) —
供應電壓 3.3 V (5.0 V compatible variant in same family) —
Configuration Clock Up to 10 MHz —
Target FPGA Families APEX II, APEX 20K/KC/KE, Mercury, ACEX 1K, FLEX 6000/10KE/10KA Cyclone, FLEX 10K, APEX, ACEX 1K (LUT-based)
封裝 20-pin PLCC (9x9 mm, JEDEC MS-018) —
安裝類型 Surface Mount (PLCC socket or direct solder) Surface Mount (PLCC socket or solder)
Programming Interface IEEE 1532 / JTAG (in-system) —
工作溫度 -40C to +85C (industrial) -40C to +85C (Industrial)
Standby Current [DATA_NEEDED: standby current uA] —
Active Configuration Current [DATA_NEEDED: ICC active mA] —
Programming Voltage [DATA_NEEDED: VPP] —
Programming Cycles [DATA_NEEDED: endurance cycles] —
MSL 等級 [DATA_NEEDED: MSL rating] —
Lead-Free / RoHS [DATA_NEEDED: lead-free status] —
Multi-Device Daisy-Chain Supported via nCASC pin —
介面類型 — Serial (Altera proprietary configuration protocol)
封裝 / 外殼 — 20-LCC (J-Lead), PLCC-20
Package Dimensions — 9 mm x 9 mm (PLCC-20 J-lead)
Supply Voltage - VCCINT — 3.0 V to 3.6 V
Supply Voltage - VCCIO — 4.5 V to 5.5 V
JTAG / Boundary Scan — IEEE 1149.1 compliant (for programming)
Programmable Compression — Yes (reduces bitstream 30-55%)
Packaging — Tube
Lead Finish — Matte Sn (per JEDEC J-STD-020)
RoHS 狀態 — Compliant

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