EPC22C20N vs EPC2LI20NGA 比較
詳細並排比較 EPC22C20N 由 Altera 與 EPC2LI20NGA 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC22C20N | EPC2LI20NGA |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | Memory ICs | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Manufacturer | Intel (formerly Altera) | Altera / Intel PSG |
| Device Type | Configuration PROM for SRAM-based LUT FPGAs | — |
| Target FPGA Family | FLEX 10K, FLEX 6000, APEX 20K series | — |
| Configuration Interface | Serial (DCLK / DATA0 / nCONFIG / nSTATUS / CONF_DONE) | Passive Serial / Passive Parallel |
| Programming Interface | IEEE 1149.1 JTAG (in-system programmable) | — |
| 供應電壓 | 3.3 V or 5 V | 3.0 V to 3.6 V (3.3 V typical) |
| 封裝 | 20-pin PLCC (J-lead) | 20-PLCC (9x9 mm) |
| Package Marking Code | EPC22C20N | — |
| 腳位數 | 20 | — |
| 安裝類型 | Surface Mount / Socket | Surface Mount / Thru-Hole Socket |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | — |
| Bitstream Capacity | [DATA_NEEDED: bitstream capacity in bits] | — |
| Configuration Time | [DATA_NEEDED: typical configuration time] | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | Compliant (lead-free 'G' suffix) |
| Lead-Free Status | [DATA_NEEDED: lead-free status] | — |
| 生命週期狀態 | Obsolete (last-time-buy from Altera announced for legacy configuration devices) | — |
| 記憶體容量 | — | 1.6 Mbit |
| 功能 | — | In-System Programmable Configuration PROM |
| Target Device | — | SRAM-based LUT FPGAs |
| 工作溫度範圍 | — | -40C to +85C (Industrial) |
| Programming Method | — | In-System via JTAG (IEEE 1149.1) |
| Cascadable | — | Yes (DATA, DCLK chain) |
| Lead-Free Termination | — | Yes (NiPdAu) |
| Process Technology | — | CMOS EEPROM |
| Datasheet Document | — | EPC2 datasheet (Altera) |