EPC2L1696-10F vs EPC22LC20 比較

詳細並排比較 EPC2L1696-10F 由 Altera 與 EPC22LC20 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC2L1696-10F EPC22LC20
品牌 Altera Intel
類別 Memory ICs FPGA & CPLD
生命週期狀態 NRND Obsolete
Device Type Configuration EPROM for SRAM-based LUT FPGAs —
Supported Logic Density 1696 LUTs —
Configuration Interface 5-pin Altera serial (nCS, DCLK, DATA, OE, nINIT_CONF) Altera serial configuration (DCLK / DATA0 / nSTATUS / CONF_DONE)
Memory Technology CMOS EEPROM —
Supply Voltage (VCC) 3.3 V —
Access Time 10 ns (speed grade -10) —
Maximum DCLK Frequency [DATA_NEEDED: DCLK max frequency] —
Program / Erase Cycles >= 100,000 cycles —
Data Retention [DATA_NEEDED: data retention years] —
In-System Programming Yes (4-wire JTAG-style interface) —
工作溫度 0C to +70C (commercial) 0 C to +70 C (commercial)
封裝 20-pin PLCC —
安裝類型 Surface Mount Surface Mount (PLCC socket compatible)
MSL 等級 [DATA_NEEDED: MSL level] —
RoHS 狀態 [DATA_NEEDED: RoHS status] —
功能 — In-System Programmable Configuration PROM for SRAM-based FPGAs
記憶體容量 — 1.6 Mbit
Programmable Type — In System Programmable (IEEE 1532 / Jam STAPL)
Supply Voltage - Low Range — 3.0 V to 3.6 V
Supply Voltage - High Range — 4.75 V to 5.25 V
Supported FPGA Families — ACEX 1K, APEX II, APEX 20K, FLEX 10K
Programming Interface — JTAG (IEEE 1149.1 / IEEE 1532)
封裝 / 外殼 — 20-LCC (J-Lead, 9 x 9 mm)
Packaging — Tube
Minimum DC Input Voltage — -0.3 V
Input Overshoot Tolerance — 7.0 V for <100 mA, <20 ns no-load
Input Undershoot Tolerance — -2.0 V for <100 mA, <20 ns no-load
Lead-Free / RoHS — [DATA_NEEDED: lead-free status not in verified data]

資料表與資源

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