EPC2L20 vs EPC2LC20EM 比較

詳細並排比較 EPC2L20 由 Altera 與 EPC2LC20EM 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC2L20 EPC2LC20EM
品牌 Altera Intel
類別 Memory ICs FPGA & CPLD
生命週期狀態 Obsolete 啟用中
記憶體類型 Configuration PROM (non-volatile) Serial Configuration Memory (EPC2 family)
記憶體容量 1.6 Mbit —
組織 8-bit byte —
介面 Serial FPGA configuration + JTAG (IEEE 1149.1 / IEEE 1532) Serial / Parallel configuration, JTAG ISP
Programmability In-system programmable via JTAG —
Core Supply Voltage (VCCINT) 3.3 V —
I/O Supply Voltage (VCCIO) 3.3 V or 5.0 V (VCCSEL selectable) —
Cascade Support Yes - multi-device daisy chain —
Boundary Scan JTAG IEEE 1149.1 BST —
封裝 20-pin PLCC (J-lead) —
安裝類型 Surface Mount (PLCC socket compatible) Surface Mount (PLCC socket or solder)
工作溫度 [DATA_NEEDED: operating temperature range] -40C to +85C (industrial)
MSL 等級 [DATA_NEEDED: MSL rating] [DATA_NEEDED: moisture sensitivity level]
RoHS 狀態 RoHS Compliant (per IC Components listing) [DATA_NEEDED: lead-free / RoHS classification]
Process Technology Low-power CMOS —
Target FPGAs APEX II, APEX 20K, Mercury, ACEX 1K, Cyclone, Stratix —
Density — 1.6 Mbit
Operating Voltage (Core) — 3.3 V
Programming Mode — In-system programmable via JTAG (IEEE 1149.1)
Package Type — PLCC-20 (plastic)
Configuration Compatibility — Stratix, Cyclone, APEX, ACEX, FLEX, MAX, Excalibur, HardCopy
Data Retention — [DATA_NEEDED: minimum data-retention years]
Program/Erase Cycles — [DATA_NEEDED: minimum endurance cycles]
Access Time — [DATA_NEEDED: tOE / tAA in ns]
Manufacturer Family — EPC2 Enhanced Configuration Device

資料表與資源

瀏覽所有產品 建立 BOM 索取報價