EPC2LC20CAD vs EPC2L20N 比較
詳細並排比較 EPC2LC20CAD 由 Altera 與 EPC2L20N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC2LC20CAD | EPC2L20N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | Memory ICs | Memory ICs |
| 生命週期狀態 | Obsolete | NRND |
| 記憶體類型 | Configuration PROM (Flash) | — |
| Memory Capacity | 1.6 Mbit | — |
| 供應電壓 | 3.3 V (nominal) | — |
| I/O Voltage Tolerance | 5 V tolerant | — |
| Configuration Mode | Serial (bit-wide, Altera FPGAs) | — |
| Program Interface | IEEE Std 1149.1 JTAG (in-system programmable) | — |
| 封裝 | 20-pin J-lead PLCC (PLCC-20) | — |
| 腳位數 | 20 | 20 |
| 工作溫度 | -40C to +85C (commercial) | 0C to +70C (commercial) |
| Maximum Input Voltage (DC) | -0.3 V to +7.0 V | — |
| Input Undershoot/Overshoot | -2.0 V to +7.0 V for <100 mA, <20 ns no-load | — |
| Compatible FPGA Families | APEX 20K, ACEX 1K, Cyclone, Stratix | — |
| Programming Method | JTAG ISP (no external programmer required) | In-system via 4-wire ISP / JTAG-style |
| RoHS 狀態 | Compliant | Compliant |
| 安裝類型 | Surface Mount / Through-hole (PLCC socket) | Surface Mount (J-Lead PLCC) |
| 功能 | — | In-System Programmable Configuration PROM for SRAM-based LUT FPGAs |
| 記憶體容量 | — | 1.6 Mbit |
| Programmable Type | — | In System Programmable (ISP) |
| Supply Voltage - VCCINT/VCCIO | — | 3.0 V to 3.6 V or 4.5 V to 5.5 V |
| 封裝 / 外殼 | — | 20-LCC (J-Lead), PLCC-20 |
| Packaging | — | Tube |
| Supported FPGA Families | — | Altera APEX, ACEX, Cyclone, FLEX 10K, Mercury (per datasheet) |
| Configuration Interface | — | Serial (Altera FPP / PS configuration scheme) |
| Cascade Support | — | Yes (multi-PROM chain via CE control) |
| Lead Finish | — | Matte Tin (Pb-free) |
| MSL 等級 | — | 3 (168 hours) |