EPC2LC20EM vs EPC22LC20 比較

詳細並排比較 EPC2LC20EM 由 Intel 與 EPC22LC20 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC2LC20EM EPC22LC20
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 啟用中 Obsolete
記憶體類型 Serial Configuration Memory (EPC2 family) —
Density 1.6 Mbit —
介面 Serial / Parallel configuration, JTAG ISP —
Operating Voltage (Core) 3.3 V —
Programming Mode In-system programmable via JTAG (IEEE 1149.1) —
Package Type PLCC-20 (plastic) —
工作溫度 -40C to +85C (industrial) 0 C to +70 C (commercial)
RoHS 狀態 [DATA_NEEDED: lead-free / RoHS classification] —
Configuration Compatibility Stratix, Cyclone, APEX, ACEX, FLEX, MAX, Excalibur, HardCopy —
Data Retention [DATA_NEEDED: minimum data-retention years] —
Program/Erase Cycles [DATA_NEEDED: minimum endurance cycles] —
Access Time [DATA_NEEDED: tOE / tAA in ns] —
安裝類型 Surface Mount (PLCC socket or solder) Surface Mount (PLCC socket compatible)
MSL 等級 [DATA_NEEDED: moisture sensitivity level] —
Manufacturer Family EPC2 Enhanced Configuration Device —
功能 — In-System Programmable Configuration PROM for SRAM-based FPGAs
記憶體容量 — 1.6 Mbit
Programmable Type — In System Programmable (IEEE 1532 / Jam STAPL)
Supply Voltage - Low Range — 3.0 V to 3.6 V
Supply Voltage - High Range — 4.75 V to 5.25 V
Supported FPGA Families — ACEX 1K, APEX II, APEX 20K, FLEX 10K
Configuration Interface — Altera serial configuration (DCLK / DATA0 / nSTATUS / CONF_DONE)
Programming Interface — JTAG (IEEE 1149.1 / IEEE 1532)
封裝 / 外殼 — 20-LCC (J-Lead, 9 x 9 mm)
Packaging — Tube
Minimum DC Input Voltage — -0.3 V
Input Overshoot Tolerance — 7.0 V for <100 mA, <20 ns no-load
Input Undershoot Tolerance — -2.0 V for <100 mA, <20 ns no-load
Lead-Free / RoHS — [DATA_NEEDED: lead-free status not in verified data]

資料表與資源

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