EPC2LC20ES vs EPC2LC20EM 比較
詳細並排比較 EPC2LC20ES 由 Intel 與 EPC2LC20EM 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC2LC20ES | EPC2LC20EM |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | Memory ICs | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| 記憶體類型 | Configuration PROM (Non-volatile) | Serial Configuration Memory (EPC2 family) |
| 記憶體容量 | 1.6 Mbit | — |
| Target Device | SRAM-based FPGAs and LUT devices | — |
| 介面 | Serial (DCLK/DATA) with JTAG ISP | Serial / Parallel configuration, JTAG ISP |
| Operating Voltage | 3.3 V and 5.0 V tolerant | — |
| JTAG Standard | IEEE Std. 1149.1 compliant | — |
| In-System Programmability | Yes (via built-in JTAG) | — |
| Boundary-Scan Test (BST) | Built-in, IEEE 1149.1 compliant | — |
| Configuration Modes | Serial and parallel supported | — |
| 封裝 | 20-PLCC (J-lead, 9x9 mm) | — |
| 安裝類型 | Surface Mount / Through-Hole (PLCC socket) | Surface Mount (PLCC socket or solder) |
| 腳位數 | 20 | — |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | -40C to +85C (industrial) |
| RoHS 狀態 | Compliant (ES suffix denotes lead-free industrial) | [DATA_NEEDED: lead-free / RoHS classification] |
| Programming Interface | JTAG (4-wire: TDI/TDO/TMS/TCK) | — |
| Manufacturer | Intel (formerly Altera) | — |
| Density | — | 1.6 Mbit |
| Operating Voltage (Core) | — | 3.3 V |
| Programming Mode | — | In-system programmable via JTAG (IEEE 1149.1) |
| Package Type | — | PLCC-20 (plastic) |
| Configuration Compatibility | — | Stratix, Cyclone, APEX, ACEX, FLEX, MAX, Excalibur, HardCopy |
| Data Retention | — | [DATA_NEEDED: minimum data-retention years] |
| Program/Erase Cycles | — | [DATA_NEEDED: minimum endurance cycles] |
| Access Time | — | [DATA_NEEDED: tOE / tAA in ns] |
| MSL 等級 | — | [DATA_NEEDED: moisture sensitivity level] |
| Manufacturer Family | — | EPC2 Enhanced Configuration Device |