EPC2LC20V vs EPC1441LC20 比較
詳細並排比較 EPC2LC20V 由 Intel 與 EPC1441LC20 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC2LC20V | EPC1441LC20 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | Memory ICs |
| 生命週期狀態 | NRND | 啟用中 |
| Product Type | Flash Configuration Device (FPGA configuration PROM) | — |
| 記憶體容量 | 1.6 Mb (1,678,336 bits) | — |
| Configuration Interface | Serial (Passive Serial) or 8-bit parallel | Serial |
| Maximum Configuration Clock | 10 MHz | — |
| Operating Voltage (VCC) | 3.0 V to 3.6 V (3.3 V typ.) | — |
| Program/Erase Cycles | 100,000 cycles minimum | — |
| Data Retention | 20 years minimum | — |
| JTAG Support | IEEE 1149.1 Boundary Scan, in-system programmable | — |
| 封裝 | PLCC-20 (JEDEC MO-047) | 20-PLCC |
| 工作溫度 | -40C to +85C (industrial) | — |
| Storage Temperature | -65C to +150C | — |
| Lead-Free / RoHS | Lead-free (V suffix), RoHS compliant | — |
| Compatible FPGAs | Cyclone, Stratix, APEX 20K, ACEX 1K, FLEX 10K, FLEX 8000 | — |
| On-chip Oscillator | Yes (generates DCLK) | — |
| Configuration Time (typical) | Depends on FPGA bitstream length and clock mode | — |
| MSL 等級 | [DATA_NEEDED: MSL level] | — |
| 記憶體類型 | — | OTP configuration PROM |
| Configuration Memory Capacity | — | 440 kb |
| Configuration Memory Capacity (Alternate Listing) | — | 400 kbit |
| Configuration Performance | — | 8 MHz |
| Target Device | — | SRAM-based LUT devices and FPGAs |
| Programmability | — | One-time programmable |
| Package Dimensions | — | 9 mm x 9 mm |
| Package Code | — | QCCJ |
| Package Shape | — | Square |
| Number of Terminals | — | 20 |
| 工作溫度範圍 | — | 0 °C to 70 °C |
| Temperature Grade | — | Commercial |
| Configuration Device Family | — | EPC14 |
| Typical Use | — | FPGA configuration memory |
| RoHS 狀態 | — | [DATA_NEEDED: RoHS status] |
| REACH Status | — | [DATA_NEEDED: REACH status] |