EPC2LC20V vs EPC2LC20NA 比較
詳細並排比較 EPC2LC20V 由 Intel 與 EPC2LC20NA 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC2LC20V | EPC2LC20NA |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | Memory ICs |
| 生命週期狀態 | NRND | 最後購買 |
| Product Type | Flash Configuration Device (FPGA configuration PROM) | — |
| 記憶體容量 | 1.6 Mb (1,678,336 bits) | — |
| Configuration Interface | Serial (Passive Serial) or 8-bit parallel | — |
| Maximum Configuration Clock | 10 MHz | — |
| Operating Voltage (VCC) | 3.0 V to 3.6 V (3.3 V typ.) | 3.3 V |
| Program/Erase Cycles | 100,000 cycles minimum | — |
| Data Retention | 20 years minimum | — |
| JTAG Support | IEEE 1149.1 Boundary Scan, in-system programmable | — |
| 封裝 | PLCC-20 (JEDEC MO-047) | 20-pin PLCC (9x9 mm) |
| 工作溫度 | -40C to +85C (industrial) | -40C to +85C (industrial grade) |
| Storage Temperature | -65C to +150C | — |
| Lead-Free / RoHS | Lead-free (V suffix), RoHS compliant | — |
| Compatible FPGAs | Cyclone, Stratix, APEX 20K, ACEX 1K, FLEX 10K, FLEX 8000 | — |
| On-chip Oscillator | Yes (generates DCLK) | — |
| Configuration Time (typical) | Depends on FPGA bitstream length and clock mode | — |
| MSL 等級 | [DATA_NEEDED: MSL level] | — |
| Manufacturer | — | Altera Corporation (Intel Programmable Solutions Group) |
| 記憶體類型 | — | Configuration PROM (Flash-based, ISP) |
| Memory Density | — | 1.6 Mbit |
| 介面 | — | Serial (passive-serial) data output to FPGA |
| Programmability | — | In-system programmable via IEEE 1532 JTAG |
| 安裝類型 | — | Surface Mount (PLCC socket compatible) |
| Supported FPGA Families | — | APEX 20K, ACEX 1K, FLEX 10K, FLEX 6000, Cyclone, Mercury |
| JTAG Compliance | — | IEEE Std 1149.1 / IEEE 1532 |
| Configuration Mode | — | Passive Serial (PS) |
| RoHS 狀態 | — | [DATA_NEEDED: rohs status] |
| Daisy-Chain Support | — | Yes |
| Recommended Companion FPGA | — | Altera Cyclone, FLEX 10K, APEX 20K series |