EPC2LC2QN vs EPC4QC100N 比較

詳細並排比較 EPC2LC2QN 由 Altera 與 EPC4QC100N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC2LC2QN EPC4QC100N
品牌 Altera Intel
類別 Memory ICs Memory ICs
生命週期狀態 Obsolete NRND
Product Type FPGA Configuration Device —
Configuration Memory Size 2 Mb —
Target Device Family SRAM-Based LUT FPGAs (APEX II, Cyclone, Stratix) —
Core Supply Voltage 3.3 V —
I/O Supply Voltage 3.3 V —
工作溫度 0°C to +70°C (Commercial) 0 C to 70 C (commercial)
封裝 100-pin PQFP 100-pin PQFP (Plastic Quad Flat Pack)
安裝類型 Surface Mount Surface Mount
Configuration Interface 4-wire Serial (DATA, DCLK, nCONFIG, nSTATUS) Serial / Parallel / JTAG (IEEE 1149.1)
Programming Interface JTAG (IEEE 1149.1) —
Bitstream Compression Supported (Altera-compressed format) —
Multi-Device Daisy-Chain Support Yes (up to 8 FPGAs) —
In-System Programmability Yes —
Bitstream Programming Cycles [DATA_NEEDED: minimum endurance cycles] —
RoHS 狀態 Compliant —
Lead-Free Yes —
MSL 等級 [DATA_NEEDED: MSL rating] —
Country of Origin [DATA_NEEDED: COO] —
記憶體類型 — Flash (NOR, configuration PROM)
記憶體容量 — 4 Mbit (4,194,304 bits)
Programmable Type — In System Programmable (ISP)
Maximum DCLK Frequency — 66.7 MHz
On-Chip Decompression — Yes
Supply Voltage (VCC) — 3.0 V to 3.6 V
Typical Supply Voltage — 3.3 V
Package Dimensions — 20 x 14 mm
Pin Pitch — 0.65 mm
Packaging — Tray
Lead Free / RoHS — Yes (per chipdig datasheet excerpt)
Family — EPC4 Enhanced Configuration Device
JTAG Support — Yes (IEEE 1149.1 boundary-scan)

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