EPC2LI20N vs EPC2LC20EM 比較
詳細並排比較 EPC2LI20N 由 Altera 與 EPC2LC20EM 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC2LI20N | EPC2LC20EM |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | Memory ICs | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 啟用中 |
| 記憶體類型 | Non-volatile configuration PROM (Flash) | Serial Configuration Memory (EPC2 family) |
| 記憶體容量 | 1.6 Mbit | — |
| Programmable Type | In System Programmable (ISP via JTAG) | — |
| Configuration Mode | Serial | — |
| Maximum Configuration Frequency | 10 MHz | — |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V | — |
| Supply Voltage (VCCIO) | 4.5 V to 5.5 V | — |
| 封裝 / 外殼 | 20-PLCC (J-Lead), 9x9 mm | — |
| 安裝類型 | Surface Mount | Surface Mount (PLCC socket or solder) |
| Packaging | Tube | — |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | -40C to +85C (industrial) |
| Supported FPGA Series | ACEX 1K, APEX II, Cyclone, Stratix II | — |
| JTAG Interface | IEEE 1149.1 boundary scan (TCK/TDI/TMS/TDO) | — |
| Configuration Pins | nCS, DCLK, DATA, nCONFIG, nSTATUS, CONF_DONE | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: lead-free / RoHS classification] |
| Density | — | 1.6 Mbit |
| 介面 | — | Serial / Parallel configuration, JTAG ISP |
| Operating Voltage (Core) | — | 3.3 V |
| Programming Mode | — | In-system programmable via JTAG (IEEE 1149.1) |
| Package Type | — | PLCC-20 (plastic) |
| Configuration Compatibility | — | Stratix, Cyclone, APEX, ACEX, FLEX, MAX, Excalibur, HardCopy |
| Data Retention | — | [DATA_NEEDED: minimum data-retention years] |
| Program/Erase Cycles | — | [DATA_NEEDED: minimum endurance cycles] |
| Access Time | — | [DATA_NEEDED: tOE / tAA in ns] |
| MSL 等級 | — | [DATA_NEEDED: moisture sensitivity level] |
| Manufacturer Family | — | EPC2 Enhanced Configuration Device |