EPC2LI20N vs EPC2LC21N 比較
詳細並排比較 EPC2LI20N 由 Altera 與 EPC2LC21N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC2LI20N | EPC2LC21N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | Memory ICs | Memory ICs |
| 生命週期狀態 | Obsolete | Obsolete |
| 記憶體類型 | Non-volatile configuration PROM (Flash) | Configuration PROM (EPROM/EEPROM-based) |
| 記憶體容量 | 1.6 Mbit | 1.6 Mbit |
| Programmable Type | In System Programmable (ISP via JTAG) | — |
| Configuration Mode | Serial | — |
| Maximum Configuration Frequency | 10 MHz | — |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V | — |
| Supply Voltage (VCCIO) | 4.5 V to 5.5 V | — |
| 封裝 / 外殼 | 20-PLCC (J-Lead), 9x9 mm | — |
| 安裝類型 | Surface Mount | Surface Mount (PLCC socket compatible) |
| Packaging | Tube | — |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | -40C to +85C (industrial) |
| Supported FPGA Series | ACEX 1K, APEX II, Cyclone, Stratix II | — |
| JTAG Interface | IEEE 1149.1 boundary scan (TCK/TDI/TMS/TDO) | — |
| Configuration Pins | nCS, DCLK, DATA, nCONFIG, nSTATUS, CONF_DONE | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | Compliant |
| 供應電壓 | — | 3.3 V |
| 介面 | — | Serial (Altera FPP/PS configuration) |
| Programmability | — | In-system programmable via JTAG (ISP) |
| Configuration Method | — | Serial data stream to FPGA DCLK/DATA |
| 封裝 | — | 20-pin PLCC (9x9 mm) |
| JTAG Support | — | Yes (IEEE 1149.1 boundary-scan) |
| Endurance (ISP writes) | — | [DATA_NEEDED: ISP write endurance cycles] |
| Data Retention | — | [DATA_NEEDED: data retention years] |
| Lead-Free | — | Yes |
| Target FPGAs | — | Altera APEX, ACEX, FLEX, Cyclone, MAX series |