EPC2LI20NGA vs EPC2C20 比較
詳細並排比較 EPC2LI20NGA 由 Altera 與 EPC2C20 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC2LI20NGA | EPC2C20 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 啟用中 |
| 記憶體容量 | 1.6 Mbit | — |
| 功能 | In-System Programmable Configuration PROM | — |
| Target Device | SRAM-based LUT FPGAs | — |
| 封裝 | 20-PLCC (9x9 mm) | [DATA_NEEDED: package] |
| 工作溫度範圍 | -40C to +85C (Industrial) | [DATA_NEEDED: operating temperature range] |
| 供應電壓 | 3.0 V to 3.6 V (3.3 V typical) | — |
| Configuration Interface | Passive Serial / Passive Parallel | — |
| Programming Method | In-System via JTAG (IEEE 1149.1) | — |
| Cascadable | Yes (DATA, DCLK chain) | — |
| RoHS 狀態 | Compliant (lead-free 'G' suffix) | [DATA_NEEDED: RoHS status] |
| 安裝類型 | Surface Mount / Thru-Hole Socket | — |
| Lead-Free Termination | Yes (NiPdAu) | — |
| Process Technology | CMOS EEPROM | — |
| Manufacturer | Altera / Intel PSG | Altera |
| Datasheet Document | EPC2 datasheet (Altera) | — |
| MPN | — | EPC2C20 |
| Device Type | — | Configuration device integrated circuit |
| Primary Function | — | Configuration of SRAM-based lookup-table devices |
| Configuration Architecture | — | Single-device configuration solution |
| Architecture Block 1 | — | Configuration controller |
| Architecture Block 2 | — | Flash memory |
| Memory Technology | — | Flash memory |
| Supported Device Class | — | SRAM-based LUT devices |
| Configuration Mode | — | [DATA_NEEDED: configuration mode] |
| Memory Density | — | [DATA_NEEDED: memory density] |
| Configuration Data Interface | — | [DATA_NEEDED: configuration data interface] |
| Operating Voltage | — | [DATA_NEEDED: operating voltage] |
| Configuration Clock Frequency | — | [DATA_NEEDED: configuration clock frequency] |
| 腳位數 | — | [DATA_NEEDED: pin count] |
| REACH Status | — | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification] |