EPC2T132N vs EPC2T132U 比較

詳細並排比較 EPC2T132N 由 Altera 與 EPC2T132U 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC2T132N EPC2T132U
品牌 Altera Intel
類別 FPGA & CPLD Memory ICs
生命週期狀態 Obsolete Obsolete
記憶體類型 Flash (NOR, serial configuration) —
Memory Capacity 1.6 Mbit (2 Mbit raw, 1.6 Mbit usable) —
Serial Clock Frequency 10 MHz maximum —
介面 Altera serial configuration (4-wire JTAG for ISP) Serial (Passive Serial), JTAG (IEEE 1149.1), Passive Parallel
供應電壓 3.0 V to 3.6 V 3.3 V
工作溫度 -40C to +85C (industrial) [DATA_NEEDED: operating temperature range]
封裝 TQFP-32 (T132) 132-pin UQFP (Ultra-thin Quad Flat Pack)
安裝類型 Surface Mount Surface Mount
Program/Erase Endurance 100,000 cycles per sector —
Data Retention 20 years minimum —
In-System Programmable Yes (IEEE 1149.1 JTAG) —
Configuration Compatibility APEX II, APEX 20K, ACEX 1K, FLEX 10K/10KE/6000, Cyclone, Stratix, Mercury —
Multi-Device Daisy Chain Yes (supported) —
RoHS 狀態 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
MSL 等級 [DATA_NEEDED: MSL level] [DATA_NEEDED: MSL level]
Lead-Free [DATA_NEEDED: lead-free status] [DATA_NEEDED: lead-free status]
Manufacturer — Intel (formerly Altera)
Product Type — FPGA Configuration Device (Boot PROM)
Target FPGAs — Altera APEX II, Cyclone, Stratix, and other SRAM-based LUT FPGAs
Configuration Memory Size — [DATA_NEEDED: configuration memory size in bits]
In-System Programmability — Yes (via JTAG)
JTAG Support — Yes (IEEE 1149.1 compliant TAP)
Configuration Clock — Internal oscillator (no external crystal required)
Data Compression — Yes (up to 2x compression vs competing PROMs)
生命週期狀態 — Obsolete (per Altera/Intel product discontinuance)
Compatible Quartus Version — [DATA_NEEDED: Quartus version supporting EPC2]

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