EPC2T32 vs EPC2T32U-CAF48 比較

詳細並排比較 EPC2T32 由 Altera 與 EPC2T32U-CAF48 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC2T32 EPC2T32U-CAF48
品牌 Altera Altera
類別 Memory ICs Memory ICs
生命週期狀態 NRND 最後購買
Product Type FPGA Configuration PROM (non-volatile boot memory) —
記憶體容量 1.6 Mbit —
Configuration Interface Serial Altera FPP (8-bit) / PS (4-wire) / AS (serial)
最大時脈頻率 10 MHz —
Programmability In-System Programmable (ISP) via JTAG —
JTAG Support Yes (IEEE 1149.1 boundary-scan + ISP) —
封裝 32-pin TQFP (7x7 mm) 48-pin QFN (CAF suffix)
供應電壓 3.3 V (5 V tolerant I/O per datasheet) —
工作溫度 -40C to +85C (industrial) -40 C to +85 C (industrial grade, "U")
Supported FPGA Families APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K Cyclone, Cyclone II, Stratix, APEX 20K, ACEX 1K, Mercury, Excalibur
Cascadable No (single-device configuration only) —
安裝類型 Surface Mount Surface Mount
MSL 等級 [DATA_NEEDED: MSL level] [DATA_NEEDED: MSL level]
RoHS 狀態 Compliant Compliant
Lead-Free Yes —
Configuration Mode Serial (DCLK/DATA/nCS) —
Document Size (third-party) 26 pages (per alldatasheet listing) —
記憶體類型 — Non-volatile flash configuration memory
Memory Density — 2 Mb (2097152 bits)
Maximum Configuration Clock (DCLK) — 8 MHz
Supply Voltage (VCC) — 3.3 V (typical)
I/O Tolerance — 5 V tolerant
Program/Erase Endurance — 10,000 cycles per sector minimum
Data Retention — 20 years minimum
Programming Interface — IEEE 1149.1 (JTAG) / IEEE 1532
Lead-Free Finish — Yes (CAF suffix indicates lead-free)

資料表與資源

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