EPC2T32N vs EPC2T32 比較
詳細並排比較 EPC2T32N 由 Altera 與 EPC2T32 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC2T32N | EPC2T32 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | Memory ICs |
| 生命週期狀態 | Obsolete | NRND |
| 記憶體容量 | 1.6 Mbit | 1.6 Mbit |
| Programmable Type | In System Programmable (Flash) | — |
| Configuration Mode | Passive Serial (PS) / JTAG ISP | Serial (DCLK/DATA/nCS) |
| 最大時脈頻率 | 10 MHz | 10 MHz |
| Supply Voltage - VCCINT | 3.0 V to 3.6 V / 4.75 V to 5.25 V (dual supply) | — |
| 介面 | Serial (DCLK / DATA0 / nCONFIG / nSTATUS / CONF_DONE) | — |
| JTAG Compliance | IEEE 1149.1 (boundary-scan, ISP) | — |
| 封裝 | 32-TQFP (7x7 mm) | 32-pin TQFP (7x7 mm) |
| 工作溫度 | 0 C to +70 C | -40C to +85C (industrial) |
| 腳位數 | 32 | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Sector Architecture | Flash with built-in CRC | — |
| Cascade Support | Yes (multi-device daisy-chain) | — |
| CONF_DONE / nSTATUS Drive | Open-drain | — |
| RoHS 狀態 | Compliant (lead-free) | Compliant |
| Product Type | — | FPGA Configuration PROM (non-volatile boot memory) |
| Configuration Interface | — | Serial |
| Programmability | — | In-System Programmable (ISP) via JTAG |
| JTAG Support | — | Yes (IEEE 1149.1 boundary-scan + ISP) |
| 供應電壓 | — | 3.3 V (5 V tolerant I/O per datasheet) |
| Supported FPGA Families | — | APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K |
| Cascadable | — | No (single-device configuration only) |
| MSL 等級 | — | [DATA_NEEDED: MSL level] |
| Lead-Free | — | Yes |
| Document Size (third-party) | — | 26 pages (per alldatasheet listing) |