EPC2T32N vs EPC2TC32U-CAF48 比較

詳細並排比較 EPC2T32N 由 Altera 與 EPC2TC32U-CAF48 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC2T32N EPC2TC32U-CAF48
品牌 Altera Altera
類別 FPGA & CPLD Memory ICs
生命週期狀態 Obsolete NRND
記憶體容量 1.6 Mbit —
Programmable Type In System Programmable (Flash) —
Configuration Mode Passive Serial (PS) / JTAG ISP Serial (FPP / PS / AS via JTAG ISP)
最大時脈頻率 10 MHz —
Supply Voltage - VCCINT 3.0 V to 3.6 V / 4.75 V to 5.25 V (dual supply) —
介面 Serial (DCLK / DATA0 / nCONFIG / nSTATUS / CONF_DONE) —
JTAG Compliance IEEE 1149.1 (boundary-scan, ISP) —
封裝 32-TQFP (7x7 mm) 32-pin TQFP
工作溫度 0 C to +70 C —
腳位數 32 —
安裝類型 Surface Mount —
Sector Architecture Flash with built-in CRC —
Cascade Support Yes (multi-device daisy-chain) —
CONF_DONE / nSTATUS Drive Open-drain —
RoHS 狀態 Compliant (lead-free) Compliant per distributor listings
記憶體類型 — Non-volatile configuration flash
Configuration Memory Density — 32 Mbit
Supported FPGA Families — APEX II, APEX 20K, Mercury, Stratix, Cyclone, ACEX 1K, FLEX 10K
Programming Interface — IEEE 1149.1 JTAG (ISP)
Operating Voltage (VCC) — 3.0 V to 3.6 V (3.3V nominal)
I/O Bank Voltage (multiVolt) — 1.8 V / 2.5 V / 3.3 V / 5.0 V
工作溫度範圍 — -40 C to +85 C (industrial grade)
Decompression Support — Yes (Quartus-derived compressed bitstream)
Multi-Device JTAG Chain — Yes (nINIT_CONF / nSTATUS chaining)
Replacement for — EPC1 and EPC1441 legacy configuration devices
Lead-Free — Yes
MSL 等級 — [DATA_NEEDED: MSL level]

資料表與資源

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