EPC2TC32-U-CAF48 vs EPC2TC32CAF48 比較
詳細並排比較 EPC2TC32-U-CAF48 由 Altera 與 EPC2TC32CAF48 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPC2TC32CAF48 - Altera/Intel Configuration Device for SRAM FPGAs | TQFP-48
EPC2TC32CAF48 Obsolete規格比較
| 參數 | EPC2TC32-U-CAF48 | EPC2TC32CAF48 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | Obsolete |
| 記憶體容量 | 1.6 Mb | 32 Mbit |
| 功能 | In-system programmable configuration PROM | — |
| 供應電壓 | 3.3 V | — |
| 介面 | Serial synchronous (Altera FPGA configuration) | — |
| Programming Interface | IEEE 1149.1 JTAG | — |
| Control Pins | OE, nCS, DCLK | — |
| Cascadable | Yes (DATA output supports daisy-chain) | Yes (up to 16 devices) |
| Storage Technology | EPROM | — |
| 封裝 | 32-TQFP (7x7 mm) | TQFP-48 (CAF48) |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | -40C to +85C (industrial, per data sheet) | 0C to +70C (commercial) |
| 腳位數 | 32 | — |
| DC Input Min | -0.3 V | — |
| DC Input Overshoot | 7.0 V for <100 mA, <20 ns | — |
| DC Input Undershoot | -2.0 V for <100 mA, <20 ns | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | Compliant |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| 記憶體類型 | — | Non-volatile Flash (configuration) |
| Configuration Interface | — | Altera serial (PS mode) |
| Supply Voltage (VCC) | — | 3.3 V |
| JTAG Support | — | Yes (IEEE 1149.1 ISP) |
| Target FPGA Series | — | APEX II, Mercury, Cyclone, Stratix, ACEX, APEX 20K |
| Lead Free | — | Yes |
| MSL 等級 | — | [DATA_NEEDED: MSL level] |
| Programming Voltage | — | 3.3 V (in-system via JTAG) |
| Manufacturer | — | Altera (now Intel PSG) |
| Family | — | EPC2 (Enhanced Configuration Device, 2nd generation) |