EPC2TC32 vs EPC2TC32U 比較

詳細並排比較 EPC2TC32 由 Altera 與 EPC2TC32U 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC2TC32 EPC2TC32U
品牌 Altera Altera
類別 Memory ICs FPGA & CPLD
生命週期狀態 Obsolete NRND
記憶體容量 1.6 Mb 1.6 Mbit
Device Type In-System Programmable Configuration PROM —
供應電壓 3.3 V 3.0 V to 3.6 V or 4.75 V to 5.25 V
介面 Serial, JTAG, FPP, PS —
Programmability In-System Programmable (ISP) via JTAG —
封裝 32-TQFP (7x7 mm) 32-pin QFP (CAF48, lead-free)
腳位數 32 —
Supported FPGA Families ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX Altera Stratix, Cyclone, APEX, ACEX, Mercury, Excalibur
Configuration Modes FPP, PS, JTAG —
Internal Oscillator Yes (DCLK generation) —
Cascade Support Yes (via nCS and RDYnBUSY) —
工作溫度 [DATA_NEEDED: operating temperature range] -40 C to +85 C
安裝類型 Surface Mount Surface Mount
RoHS 狀態 [DATA_NEEDED: RoHS compliance] Compliant (lead-free / RoHS per distributor data)
Memory Technology CMOS non-volatile —
功能 — Serial Configuration Device for SRAM-based LUT FPGAs
Configuration Interface — Altera Passive Serial (DCLK / DATA0 / nCONFIG / nSTATUS / CONF_DONE)
JTAG Support — Yes (IEEE 1149.1 boundary-scan, ISP)
MSL 等級 — [DATA_NEEDED: MSL level]
Lead-Free Finish — Yes (U suffix)
Configuration Mode — Passive Serial (PS), JTAG
Configuration Time — [DATA_NEEDED: typical configuration time]
Programming Cycles — [DATA_NEEDED: minimum program/erase cycles]
Data Retention — [DATA_NEEDED: minimum data retention years]

資料表與資源

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