EPC2TC32CAF48 vs EPC2T32N 比較
詳細並排比較 EPC2TC32CAF48 由 Altera 與 EPC2T32N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPC2TC32CAF48 - Altera/Intel Configuration Device for SRAM FPGAs | TQFP-48
EPC2TC32CAF48 Obsolete
規格比較
| 參數 | EPC2TC32CAF48 | EPC2T32N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| 記憶體類型 | Non-volatile Flash (configuration) | — |
| 記憶體容量 | 32 Mbit | 1.6 Mbit |
| Configuration Interface | Altera serial (PS mode) | — |
| Supply Voltage (VCC) | 3.3 V | — |
| JTAG Support | Yes (IEEE 1149.1 ISP) | — |
| Cascadable | Yes (up to 16 devices) | — |
| Target FPGA Series | APEX II, Mercury, Cyclone, Stratix, ACEX, APEX 20K | — |
| 封裝 | TQFP-48 (CAF48) | 32-TQFP (7x7 mm) |
| 工作溫度 | 0C to +70C (commercial) | 0 C to +70 C |
| 安裝類型 | Surface Mount | Surface Mount |
| RoHS 狀態 | Compliant | Compliant (lead-free) |
| Lead Free | Yes | — |
| MSL 等級 | [DATA_NEEDED: MSL level] | — |
| Programming Voltage | 3.3 V (in-system via JTAG) | — |
| Manufacturer | Altera (now Intel PSG) | — |
| Family | EPC2 (Enhanced Configuration Device, 2nd generation) | — |
| Programmable Type | — | In System Programmable (Flash) |
| Configuration Mode | — | Passive Serial (PS) / JTAG ISP |
| 最大時脈頻率 | — | 10 MHz |
| Supply Voltage - VCCINT | — | 3.0 V to 3.6 V / 4.75 V to 5.25 V (dual supply) |
| 介面 | — | Serial (DCLK / DATA0 / nCONFIG / nSTATUS / CONF_DONE) |
| JTAG Compliance | — | IEEE 1149.1 (boundary-scan, ISP) |
| 腳位數 | — | 32 |
| Sector Architecture | — | Flash with built-in CRC |
| Cascade Support | — | Yes (multi-device daisy-chain) |
| CONF_DONE / nSTATUS Drive | — | Open-drain |