EPC2TC32CAF48 vs EPC2TC32U 比較

詳細並排比較 EPC2TC32CAF48 由 Altera 與 EPC2TC32U 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC2TC32CAF48 EPC2TC32U
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete NRND
記憶體類型 Non-volatile Flash (configuration) —
記憶體容量 32 Mbit 1.6 Mbit
Configuration Interface Altera serial (PS mode) Altera Passive Serial (DCLK / DATA0 / nCONFIG / nSTATUS / CONF_DONE)
Supply Voltage (VCC) 3.3 V —
JTAG Support Yes (IEEE 1149.1 ISP) Yes (IEEE 1149.1 boundary-scan, ISP)
Cascadable Yes (up to 16 devices) —
Target FPGA Series APEX II, Mercury, Cyclone, Stratix, ACEX, APEX 20K —
封裝 TQFP-48 (CAF48) 32-pin QFP (CAF48, lead-free)
工作溫度 0C to +70C (commercial) -40 C to +85 C
安裝類型 Surface Mount Surface Mount
RoHS 狀態 Compliant Compliant (lead-free / RoHS per distributor data)
Lead Free Yes —
MSL 等級 [DATA_NEEDED: MSL level] [DATA_NEEDED: MSL level]
Programming Voltage 3.3 V (in-system via JTAG) —
Manufacturer Altera (now Intel PSG) —
Family EPC2 (Enhanced Configuration Device, 2nd generation) —
功能 — Serial Configuration Device for SRAM-based LUT FPGAs
供應電壓 — 3.0 V to 3.6 V or 4.75 V to 5.25 V
Lead-Free Finish — Yes (U suffix)
Supported FPGA Families — Altera Stratix, Cyclone, APEX, ACEX, Mercury, Excalibur
Configuration Mode — Passive Serial (PS), JTAG
Configuration Time — [DATA_NEEDED: typical configuration time]
Programming Cycles — [DATA_NEEDED: minimum program/erase cycles]
Data Retention — [DATA_NEEDED: minimum data retention years]

資料表與資源

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