EPC2TC32CAF48 vs EPC2TC32UCAD48 比較
詳細並排比較 EPC2TC32CAF48 由 Altera 與 EPC2TC32UCAD48 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPC2TC32CAF48 - Altera/Intel Configuration Device for SRAM FPGAs | TQFP-48
EPC2TC32CAF48 Obsolete
規格比較
| 參數 | EPC2TC32CAF48 | EPC2TC32UCAD48 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | Memory ICs |
| 生命週期狀態 | Obsolete | NRND |
| 記憶體類型 | Non-volatile Flash (configuration) | In-System Programmable Configuration PROM (Flash) |
| 記憶體容量 | 32 Mbit | — |
| Configuration Interface | Altera serial (PS mode) | — |
| Supply Voltage (VCC) | 3.3 V | — |
| JTAG Support | Yes (IEEE 1149.1 ISP) | — |
| Cascadable | Yes (up to 16 devices) | — |
| Target FPGA Series | APEX II, Mercury, Cyclone, Stratix, ACEX, APEX 20K | — |
| 封裝 | TQFP-48 (CAF48) | 32-TQFP (7x7 mm, 0.8 mm pitch) |
| 工作溫度 | 0C to +70C (commercial) | — |
| 安裝類型 | Surface Mount | — |
| RoHS 狀態 | Compliant | Compliant |
| Lead Free | Yes | — |
| MSL 等級 | [DATA_NEEDED: MSL level] | 3 (168 hours) |
| Programming Voltage | 3.3 V (in-system via JTAG) | — |
| Manufacturer | Altera (now Intel PSG) | — |
| Family | EPC2 (Enhanced Configuration Device, 2nd generation) | — |
| Density | — | 1.6 Mbit |
| Configuration Clock | — | 10 MHz max |
| 介面 | — | Serial (AS) / Parallel (FPP, PS) / JTAG (IEEE 1149.1) |
| 供應電壓 | — | 3.3 V (typical) |
| Programmability | — | In-system via JTAG (ISP), 100,000 erase/write cycles |
| 工作溫度範圍 | — | -40 C to +85 C (industrial, U-suffix) |
| 腳位數 | — | 32 |
| Cascade Support | — | Yes (multi-device daisy-chain) |
| Multi-Boot Support | — | Yes (Altera remote system upgrade) |
| Compatible FPGAs | — | Altera Cyclone, Stratix, APEX, ACEX, Mercury families |
| Lead-Free | — | Yes |