EPC2TC32N vs EPC2T32N 比較
詳細並排比較 EPC2TC32N 由 Altera 與 EPC2T32N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC2TC32N | EPC2T32N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | Memory ICs | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Manufacturer | Altera (now Intel) | — |
| 記憶體類型 | Flash Configuration PROM | — |
| 記憶體容量 | 1.6 Mbit | 1.6 Mbit |
| Programmable Type | In System Programmable (ISP) | In System Programmable (Flash) |
| 介面 | JTAG (IEEE 1149.1) + serial/parallel | Serial (DCLK / DATA0 / nCONFIG / nSTATUS / CONF_DONE) |
| Supply Voltage - VCCINT | 3.0 V to 3.6 V or 4.75 V to 5.25 V | 3.0 V to 3.6 V / 4.75 V to 5.25 V (dual supply) |
| Supply Voltage - VCCIO | 3.0 V to 3.6 V or 4.75 V to 5.25 V | — |
| Max Configuration Clock | 8 MHz | — |
| 封裝 | 32-TQFP (7x7 mm) | 32-TQFP (7x7 mm) |
| 工作溫度 | 0 °C to +70 °C (Commercial) | 0 C to +70 C |
| Supported FPGA Families | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX | — |
| Daisy-Chain Support | Yes (multi-FPGA cascade) | — |
| JTAG Compliance | IEEE 1149.1 | IEEE 1149.1 (boundary-scan, ISP) |
| 安裝類型 | Surface Mount | Surface Mount |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance status] | Compliant (lead-free) |
| Configuration Mode | Serial (AS) or Parallel (PS/AP) | Passive Serial (PS) / JTAG ISP |
| 最大時脈頻率 | — | 10 MHz |
| 腳位數 | — | 32 |
| Sector Architecture | — | Flash with built-in CRC |
| Cascade Support | — | Yes (multi-device daisy-chain) |
| CONF_DONE / nSTATUS Drive | — | Open-drain |