EPC2TI32 vs EPC2TI32N 比較
詳細並排比較 EPC2TI32 由 Altera 與 EPC2TI32N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC2TI32 | EPC2TI32N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | Memory ICs | Memory ICs |
| 生命週期狀態 | Obsolete | Obsolete |
| Memory Density | 1.6 Mbit | — |
| 記憶體類型 | Flash (in-system programmable) | In-System Programmable Configuration PROM (Flash) |
| Configuration Interface | Serial (Altera FPGA configuration protocol) | — |
| Configuration Clock Frequency | 10 MHz | — |
| JTAG Interface | IEEE 1149.1 boundary-scan (ISP + JTAG) | Yes (IEEE 1149.1 compliant TAP for ISP) |
| 供應電壓 | 3.0 V to 5.5 V | — |
| 封裝 | 32-pin TQFP (7x7 mm) | — |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | -40C to +85C | -40C to +85C |
| Compatible FPGA Families | APEX II, APEX 20K, Mercury, FLEX 10K, ACEX 1K, Cyclone | — |
| Cascading Support | Yes (multiple devices for larger bitstreams) | — |
| Data Compression | Altera compressed bitstream compatible | — |
| Program/Erase Cycles | [DATA_NEEDED: endurance cycles] | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| 記憶體容量 | — | 1.6 Mbit |
| Programmable Type | — | In System Programmable (ISP via JTAG) |
| 介面類型 | — | Parallel configuration data output + JTAG (IEEE 1149.1) ISP |
| Supply Voltage - 3.3V Mode | — | 3.0 V to 3.6 V |
| Supply Voltage - 5V Mode | — | 4.5 V to 5.5 V |
| 封裝 / 外殼 | — | 32-TQFP (7x7 mm) |
| Packaging | — | Tray |
| Supported FPGA Families | — | ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, Mercury, FLEX 10K |
| Configuration Pins | — | nCONFIG, nSTATUS, CONF_DONE, DCLK, DATA[7:0] |
| Lead Free | — | [DATA_NEEDED: lead-free status] |