EPC40C100 vs EPC16UC88 比較

詳細並排比較 EPC40C100 由 Altera 與 EPC16UC88 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC40C100 EPC16UC88
品牌 Altera Altera
類別 FPGA & CPLD Memory ICs
生命週期狀態 Obsolete Unknown
Memory Density 40 Mbit —
Device Family Enhanced Configuration Device —
Target FPGAs Stratix, Cyclone, APEX, Mercury, ACEX families —
Configuration Mode FPP (Fast Passive Parallel) / PS (Passive Serial) —
Interface Voltage 2.5 V / 3.3 V —
Maximum FPP Clock Frequency 66 MHz —
Programmability In-system programmable (JTAG) —
Error Detection Built-in CRC verification —
工作溫度範圍 -40 C to +85 C (industrial) —
封裝 100-pin EQFP (Enhanced Quad Flat Pack) 88-UBGA (11x8)
Pin Pitch 0.5 mm —
安裝類型 Surface Mount Surface mount
MSL 等級 3 (168 hours) —
RoHS 狀態 Compliant [DATA_NEEDED: RoHS status]
Lead-Free Yes —
記憶體類型 NOR Flash —
Device Type — In-system programmable configuration PROM for FPGAs
Configuration Memory Capacity — 16 Mb
供應電壓 — 3.3 V core and I/O
Package Family — UBGA
In-System Programmability — IEEE Std. 1532 compatible
Programming Language Support — Jam Standard Test and Programming Language (STAPL)
JTAG Boundary Scan — Supported
nINIT_CONF Function — Allows private JTAG instruction to start FPGA configuration
Configuration Architecture — Configuration controller and flash memory
FPGA Configuration Use — Automatic configuration after power-up or system initialization
Data Output — Configuration data output controlled by OE and nCS
Output Control — OE and nCS control tri-state buffer and address counter
Package Dimensions — 11 mm x 8 mm
REACH Status — [DATA_NEEDED: REACH status]
工作溫度 — [DATA_NEEDED: operating temperature]
Output Current — [DATA_NEEDED: output current]
Configuration Frequency — [DATA_NEEDED: configuration frequency]
AEC-Q100 Qualification — [DATA_NEEDED: AEC-Q100 qualification]

資料表與資源

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