EPC40C100N vs EPC160C100 比較

詳細並排比較 EPC40C100N 由 Intel 與 EPC160C100 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC40C100N EPC160C100
品牌 Intel Altera
類別 Memory ICs Memory ICs
生命週期狀態 Obsolete Obsolete
Manufacturer Intel (formerly Altera) —
Part Family Enhanced Configuration Device (EPC) —
功能 Configuration memory for SRAM-based LUT FPGAs —
Memory Density 40 Mbit (5 Mbyte) —
Memory Technology Non-volatile Flash with internal SRAM buffer Flash-based non-volatile configuration memory
Programmability In-system programmable via IEEE 1149.1 JTAG —
Configuration Interface Serial (4-wire) or 8-bit parallel Serial / Parallel, Altera nCONFIG/nSTATUS/CONF_DONE protocol
輸出電壓 3.3 V or 2.5 V selectable —
Configuration Clock Frequency Up to 66 MHz —
Internal Oscillator Yes (eliminates external configuration clock) —
Cascade Support Yes - multiple devices can be chained for >40 Mb bitstreams Yes (nCASC pin for multi-FPGA daisy chain)
Page Mode Operation Yes - reduces configuration time —
封裝 PQFP-100 (100-pin Plastic Quad Flat Pack) PQFP-100
安裝類型 Surface Mount Surface Mount
工作溫度 -40 C to +85 C (industrial) [DATA_NEEDED: operating temperature range]
Compliance RoHS compliant (Pb-free option available) —
Compatible FPGA Families Altera Cyclone, Stratix, APEX, ACEX, Mercury —
Device Type — Enhanced Configuration Device (EPC) for SRAM-based LUT FPGAs
Supported FPGA Families — Altera APEX, Cyclone, Stratix, and other SRAM-based LUT devices
Configuration Density — 160 Mbit equivalent tier
Operating Voltage (Core) — 3.3 V
Programming Interface — JTAG (IEEE 1149.1) in-system programmable
腳位數 — 100
MSL 等級 — [DATA_NEEDED: MSL rating]
RoHS 狀態 — [DATA_NEEDED: RoHS compliance status]
Lead-Free — [DATA_NEEDED: lead-free status]

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