EPC448JC-30A vs EPC2LI20 比較

詳細並排比較 EPC448JC-30A 由 Altera 與 EPC2LI20 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC448JC-30A EPC2LI20
品牌 Altera Altera
類別 FPGA & CPLD Memory ICs
生命週期狀態 NRND NRND
Memory Density 4 Mbit —
Device Family Enhanced Configuration Device —
Supply Voltage (VCC) 3.3 V nominal —
Operating Voltage Range 3.0 V to 3.6 V —
Access Time 30 ns —
Configuration Interface Altera serial (DCLK + DATA0) and JTAG ISP Serial or Byte-wide (parallel)
Package Type PLCC-32 (JC) —
腳位數 32 —
安裝類型 Surface Mount / Socket Surface Mount (PLCC socket-compatible)
工作溫度 0 C to +70 C -40 C to +85 C (Industrial)
Programmability IEEE 1532 JTAG In-System Programmable —
Compatibility FLEX, APEX, ACEX, Cyclone, Stratix FPGAs —
Lead-Free / RoHS [DATA_NEEDED: lead-free / RoHS status] —
AEC-Q100 Qualification Not Qualified —
Configuration Control Pins nSTATUS, nCONFIG, CONF_DONE —
記憶體容量 — 1.6 Mb (1,572,864 bits)
記憶體類型 — Flash (in-system programmable)
Programmable Type — In System Programmable (ISP)
功能 — Configuration PROM for SRAM-based FPGAs
Supply Voltage - Operating — 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing)
封裝 / 外殼 — 20-PLCC (J-lead, 9x9 mm)
Decompression — On-chip (supports compressed bitstreams)
JTAG / ISP Interface — IEEE 1532 (TCK, TMS, TDI, TDO)
Multi-Device Support — Yes (daisy-chain configuration)
User-Accessible Memory — Yes (unused flash available to user logic)
RoHS 狀態 — [DATA_NEEDED: RoHS status]
MSL 等級 — [DATA_NEEDED: MSL level]

資料表與資源

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