EPC4Q100T vs EPC4QC1C00N 比較

詳細並排比較 EPC4Q100T 由 Intel 與 EPC4QC1C00N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC4Q100T EPC4QC1C00N
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 NRND Obsolete
記憶體容量 4 Mbit —
記憶體類型 Flash (non-volatile) —
功能 Enhanced Configuration Device for SRAM-based LUT FPGAs —
Configuration Modes Supported PS, FPP (16-bit), AS —
Flash Access Time 90 ns (approx 10 MHz core clock) —
Maximum Configuration Data Rate 160 Mbps (FPP, 16-bit bus) —
資料匯流排寬度 16-bit (DQ[15:0]) —
In-System Programming Yes (JTAG IEEE 1149.1) JTAG (IEEE 1149.1)
Supply Voltage (Core) 3.3 V —
I/O Voltage Tolerance 3.3 V (5 V tolerant on legacy interface pins) 3.3 V / 5 V tolerant
Package Type PQFP-100 (Plastic Quad Flat Pack) —
Package Dimensions 20 x 14 mm —
工作溫度範圍 [DATA_NEEDED: operating temperature range] —
Compatible FPGA Families Stratix, Cyclone, APEX, Mercury, ACEX —
RoHS 狀態 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance status]
Manufacturer Intel (formerly Altera) —
Device Family — Enhanced Configuration Device (EPC4)
Memory Density — 4 Mbit (4,194,304 bits)
Supply Voltage (VCC) — 3.0 V to 3.6 V (3.3 V typical)
Interface to FPGA — Serial DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE
Configuration Data Width — 4-bit multiplexed on single DATA pin
封裝 — 100-pin PQFP (QFP-100)
工作溫度 — -40 C to +85 C (industrial)
Programming Voltage — On-chip generated, no external VPP
Page Mode — Yes, multi-page storage supported
Target FPGA Families — Stratix, Cyclone, APEX, Mercury, ACEX
Configuration Clock (DCLK) — [DATA_NEEDED: DCLK max frequency]
MSL 等級 — 3 (per JEDEC J-STD-020)
Lead-Free — [DATA_NEEDED: lead-free status]

資料表與資源

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