EPC80C100T vs EPC4QC100 比較

詳細並排比較 EPC80C100T 由 Intel 與 EPC4QC100 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC80C100T EPC4QC100
品牌 Intel Altera
類別 FPGA & CPLD Memory ICs
生命週期狀態 NRND Obsolete
Product Type Enhanced Configuration Device for SRAM-based LUT FPGAs —
Manufacturer Intel (formerly Altera) —
Family Enhanced Configuration (EPC) Devices —
Memory Density [DATA_NEEDED: density in Mbit] —
供應電壓 3.0 V to 3.6 V (3.3 V typical) —
Configuration Modes FPP, PPS, PPA, PS, JTAG —
JTAG Interface IEEE 1149.1 in-system programming —
Internal Oscillator 50 MHz —
Multi-Boot Pages Up to 8 configuration pages —
Page-Mode Read Supported —
In-System Programmability Yes (continuous, via JTAG) IEEE Std. 1532 compliant
封裝 100-pin PQFP (T = tape and reel) 100-pin PQFP (20x14 mm)
Compatible FPGA Families APEX 20K, APEX II, Mercury, ACEX 1K, Cyclone, Stratix Stratix, Cyclone, APEX, Mercury, ACEX
工作溫度 -40C to +85C (industrial, [DATA_NEEDED: confirm grade]) 0C to +70C (commercial)
RoHS 狀態 [DATA_NEEDED: verify from manufacturer page] unknown
Lead-Free [DATA_NEEDED: verify from manufacturer page] unknown
功能 — In-System Programmable Configuration PROM for FPGAs
記憶體類型 — Flash
記憶體容量 — 4 Mb
Supply Voltage (Core and I/O) — 3.3 V
Maximum Configuration Clock — 66 MHz
介面 — Serial / Fast Passive (Altera FPGAs)
JTAG Support — Yes (boundary scan + ISP via Jam STAPL)
nINIT_CONF Pin — Yes (triggers FPGA configuration via private JTAG instruction)
安裝類型 — Surface Mount

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