EPC8C100T vs EPC8Q100TBAC 比較

詳細並排比較 EPC8C100T 由 Altera 與 EPC8Q100TBAC 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC8C100T EPC8Q100TBAC
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Product Type Enhanced Configuration Device (Serial Configuration PROM) —
Memory Density 8 Mbit —
Memory Technology Flash (in-system programmable) —
介面 Serial FPGA configuration (Altera/Intel proprietary) —
Programming Interface JTAG (IEEE 1149.1) / ISP IEEE 1532 / JTAG (in-system programmable)
供應電壓 3.3 V 3.3 V
工作溫度 -40C to +85C (industrial) Industrial grade (TBAC suffix)
封裝 100-pin PQFP (20 x 14 mm) QFP (TBAC suffix)
安裝類型 Surface Mount Surface Mount
Page Reprogram Cycles 100 minimum —
Supported FPGA Families Cyclone, Cyclone II, APEX II, APEX 20K, ACEX 1K, Mercury, Excalibur —
Configuration Clock Internal / external via DCLK —
Cascade Support Yes (multi-device daisy chain) —
RoHS 狀態 Unknown [DATA_NEEDED: RoHS compliance status]
生命週期狀態 Obsolete (Altera/Intel legacy configuration device) —
記憶體容量 — 8 Mb
記憶體類型 — Flash (non-volatile configuration storage)
Access Time — 90 ns (approximately 10 MHz flash read)
Flash Read Bandwidth — Approximately 160 Mbps (16-bit DQ[] at 10 MHz)
資料匯流排寬度 — 16-bit (DQ[])
Configuration Modes Supported — PS (Passive Serial), FPP (Fast Passive Parallel), PPA (Passive Parallel Asynchronous)
Compatible FPGA Families — Altera Stratix, Cyclone, APEX, ACEX
Lead-Free — [DATA_NEEDED: lead-free status]
Configuration Bitstream Compression — Supported (page-mode buffering)

資料表與資源

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