EPC8QC100DM vs EPC8QC100C 比較

詳細並排比較 EPC8QC100DM 由 Intel 與 EPC8QC100C 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC8QC100DM EPC8QC100C
品牌 Intel Altera
類別 EEPROM Memory ICs
生命週期狀態 Obsolete Obsolete
記憶體類型 Non-volatile configuration PROM Flash-based Configuration PROM
記憶體容量 8 Mb (1 MB) 8 Mbit
介面 Serial (Passive Serial / Passive Parallel Synchronous / Active Serial) —
Supply Voltage (VCC) 3.0 V to 3.6 V (3.3 V typical) —
Maximum DCLK Frequency 40 MHz —
In-System Programming Yes (IEEE 1149.1 / IEEE 1532 JTAG) —
Cascade Support Yes - two EPC8 devices for 16 Mb —
工作溫度 -40 C to +85 C (industrial / DM suffix) -40C to +85C (industrial)
封裝 100-PQFP (20 x 14 mm) 100-Pin PQFP (20x14 mm)
安裝類型 Surface Mount Surface Mount
MSL 等級 1 (Unlimited) [DATA_NEEDED: MSL rating]
RoHS 狀態 Compliant [DATA_NEEDED: RoHS compliance status]
Lead-Free / Halogen-Free Lead-free (per supplier); halogen status not in datasheet excerpt —
Compatible FPGA Families Cyclone, Cyclone II, Cyclone III, Stratix, Arria —
Configuration Modes PS, PPS, AS (with appropriate FPGA master) —
Programming Cycles [DATA_NEEDED: minimum erase/write endurance cycles] —
Configuration Schemes — Passive Serial, Concurrent (up to 8 chains), Parallel
Target FPGA Compatibility — Altera APEX, Stratix, Cyclone, ACEX, Mercury, FLEX series
Operating Voltage — 3.3 V typical
Programming Interface — JTAG / Altera ByteBlaster / USB-Blaster
Configuration Interface — Serial (DCLK/DATA) or Parallel
Max Configuration Clock — [DATA_NEEDED: max DCLK frequency]
Flash Erase/Program Cycles — [DATA_NEEDED: endurance cycles]
Lead-Free — [DATA_NEEDED: lead-free status]

資料表與資源

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