EPC8QC100N vs EPC4QC100N 比較

詳細並排比較 EPC8QC100N 由 Intel 與 EPC4QC100N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC8QC100N EPC4QC100N
品牌 Intel Intel
類別 Memory ICs Memory ICs
生命週期狀態 Obsolete NRND
記憶體類型 Flash (NOR, configuration PROM) Flash (NOR, configuration PROM)
記憶體容量 8 Mbit (8,388,608 bits) 4 Mbit (4,194,304 bits)
組織 512K words x 16 bits —
Configuration Device Family EPC8 (Enhanced Configuration Device) —
Supply Voltage (VCC) 3.0 V to 3.6 V (typ. 3.3 V) 3.0 V to 3.6 V
Maximum Configuration Clock 66.7 MHz —
Programmability IEEE Std. 1532 in-system programmable (ISP) —
Programming Interface JTAG (IEEE 1149.1) + Jam STAPL —
Package Type Plastic Quad Flat Pack (PQFP-100) —
腳位數 100 —
工作溫度 0 C to +70 C (commercial, N suffix) 0 C to 70 C (commercial)
nINIT_CONF Pin Yes (private JTAG instruction to start FPGA configuration) —
Compatible FPGAs Altera Stratix, Stratix GX, Cyclone, APEX 20K series —
RoHS 狀態 [DATA_NEEDED: RoHS compliance status] —
MSL 等級 [DATA_NEEDED: Moisture Sensitivity Level] —
Programmable Type — In System Programmable (ISP)
Configuration Interface — Serial / Parallel / JTAG (IEEE 1149.1)
Maximum DCLK Frequency — 66.7 MHz
On-Chip Decompression — Yes
Typical Supply Voltage — 3.3 V
封裝 — 100-pin PQFP (Plastic Quad Flat Pack)
Package Dimensions — 20 x 14 mm
Pin Pitch — 0.65 mm
安裝類型 — Surface Mount
Packaging — Tray
Lead Free / RoHS — Yes (per chipdig datasheet excerpt)
Family — EPC4 Enhanced Configuration Device
JTAG Support — Yes (IEEE 1149.1 boundary-scan)

資料表與資源

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