EPF10K200SFC672-2 vs EPF10K200SFI672-2B 比較
詳細並排比較 EPF10K200SFC672-2 由 Altera 與 EPF10K200SFI672-2B 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPF10K200SFC672-2 | EPF10K200SFI672-2B |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Series | FLEX 10KE | — |
| Logic Elements | 9,984 | 9,984 |
| System Gates | 200,000 | 200,000 |
| Logic Array Blocks (LABs) | 1,248 | — |
| User I/O Pins | 470 | — |
| Embedded Memory (bits) | 98,304 | — |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS, SRAM |
| Core Supply Voltage | 2.5 V (2.375 V to 2.625 V) | 2.5 V |
| I/O Supply Voltage | MultiVolt 2.5 V / 3.3 V / 5.0 V | — |
| Speed Grade | -2 | — |
| Internal Propagation Delay | 0.4 ns | — |
| Maximum Operating Frequency | 200 MHz | 200 MHz |
| 封裝 | 672-pin FineLine BGA (FBGA), 45 × 45 mm, 1.27 mm pitch | FBGA-672 (FineLine BGA, 27 × 27 mm, 1.0 mm pitch) |
| 工作溫度 | 0 °C to +70 °C (Commercial) | -40 °C to +85 °C (Industrial) |
| Configuration Method | SRAM-based, passive parallel asynchronous | — |
| Boundary Scan | IEEE 1149.1 (JTAG) | — |
| On-chip PLL | Yes | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance status] | Non-compliant (legacy FLEX 10KE) |
| Family | — | FLEX 10KE |
| Maximum System Gates | — | 513,000 |
| Embedded Memory | — | 98,304 bits |
| Embedded Array Blocks (EABs) | — | 24 (96 Kbits total) |
| User I/Os | — | 470 |
| PLLs | — | 4 |
| 安裝類型 | — | Surface Mount |
| Programming Memory Type | — | SRAM |