EPF10K30ETI144-3 vs EPF10K50STC144-3 比較

詳細並排比較 EPF10K30ETI144-3 由 Altera 與 EPF10K50STC144-3 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPF10K30ETI144-3 EPF10K50STC144-3
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Series FLEX-10KE FLEX 10KS
Family FLEX-10KE Embedded Programmable Logic Device FLEX 10K
Logic Elements 1728 —
Logic Array Blocks (LABs) 216 360
Embedded RAM 24,576 bits —
Embedded Array Blocks (EABs) 6 —
Maximum User I/O 102 —
Maximum Equivalent Gates 119,000 —
Pin-to-Pin Delay (Speed Grade) 12.5 ns —
Supply Voltage (Core) 2.5 V / 3.3 V —
I/O Voltage Tolerance 5.0 V / 3.3 V / 2.5 V (multi-volt) —
工作溫度 -40C to +85C (Industrial) 0 C to 70 C (commercial)
封裝 144-LQFP (LFQFP) 144-LQFP (also called LFQFP / TQFP)
Package Height 1.6 mm —
Lead Finish Tin/Lead (Sn/Pb) —
安裝類型 Surface Mount (Gull Wing) Surface Mount (Gull-wing leads)
Configuration Method SRAM (volatile) + JTAG IEEE 1149.1 —
RoHS 狀態 Non-Compliant (Sn/Pb lead finish) [DATA_NEEDED: RoHS status]
Typical Gates — 50,000
Logic Elements / Cells — 2,880
On-chip RAM Bits — 40,960
Maximum User I/Os — 102
Number of I/O Banks — [DATA_NEEDED: number of I/O banks]
Internal Operating Frequency — 166.67 MHz
Propagation Delay — 0.6 ns (typical)
Speed Grade — -3
Core Voltage — 2.5 V
I/O Voltage — 5.0 V (3.3 V LVTTL/LVCMOS compatible)
Process Technology — 0.22 um CMOS, SRAM-based
Configuration — SRAM (volatile, requires external EPC)
JTAG Boundary Scan — Built-in, IEEE Std. 1149.1-1990 compliant

資料表與資源

瀏覽所有產品 建立 BOM 索取報價