EPF10K50EQC240-3N vs EPF10K50SQC240-3N 比較

詳細並排比較 EPF10K50EQC240-3N 由 Intel 與 EPF10K50SQC240-3N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPF10K50EQC240-3N EPF10K50SQC240-3N
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Series FLEX 10KE —
Family FLEX 10K FLEX 10KE
Logic Elements / Cells 2,880 —
Total Gates 50,000 (typical) —
Logic Array Blocks (LABs) 360 360
Number of I/O 189 —
Embedded Memory (bits) 40,960 —
Supply Voltage - Core 2.5 V —
Process Technology 0.22 µm CMOS SRAM 0.22 µm CMOS
Maximum Internal Frequency 166.67 MHz —
Speed Grade -3 -3 (faster Fmax)
封裝 / 外殼 240-BFQFP (PQFP), 32.1 × 32.1 mm —
安裝類型 Surface Mount Surface Mount
工作溫度 0 °C to +70 °C (Commercial) 0 °C to 70 °C (Commercial)
Configuration Method SRAM, JTAG, EPC2/EPC8 supported —
RoHS 狀態 Compliant Compliant (Pb-free N suffix)
Logic Family — CMOS
Typical Gates — 50,000
System Gates — 40,960
Logic Cells / Elements — 2,880
Embedded Array Blocks (EABs) — 12
On-chip EAB Memory — 24 Kbits
User I/Os — 189 (per DigiKey listing); 274 user I/Os (per Digchip listing)
Number of I/Os (per distributor) — 189 (DigiKey / Mouser)
Propagation Delay (tpd) — 0.6 ns
Internal Frequency (Fmax) — 166.67 MHz
Core Supply Voltage (VCCINT) — 2.5 V
I/O Voltage (VCCIO) — MultiVolt: 2.5 V / 3.3 V / 5.0 V tolerant
封裝 — 240-pin PQFP (Power Quad Flat Pack), 34.60 x 34.6 mm, 0.5 mm pitch
Lead-Free Finish (N suffix) — Yes
JTAG Boundary Scan — IEEE Std. 1149.1 compliant
Programming Technology — SRAM-based, in-system reconfigurable via JTAG
Design Tool — Altera Quartus II (FLEX 10KE support)

資料表與資源

瀏覽所有產品 建立 BOM 索取報價