EPF8820ARC208-2N vs EPF8820ARC208-3N 比較

詳細並排比較 EPF8820ARC208-2N 由 Altera 與 EPF8820ARC208-3N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPF8820ARC208-2N EPF8820ARC208-3N
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family FLEX 8000 FLEX 8000
Usable Gates 8,000 8,000
Logic Elements (Cells) 672 —
Maximum Operating Frequency 125 MHz 125 MHz
Process Technology 0.42 µm CMOS SRAM 0.42 µm CMOS
Supply Voltage (VCCINT) 5 V 4.75 V to 5.25 V (5 V nominal)
Output Supply Voltage (VCCIO) 3.3 V or 5.0 V (bank-selectable) —
User I/O Pins 152 —
Maximum Outputs 148 —
Dedicated Inputs 4 —
封裝 208-pin RQFP / BFQFP with Exposed Pad 208-pin RQFP / BFQFP Exposed Pad (28x28 mm)
Configuration Method Serial (EPC1/EPC1213/EPC1064/EPC1441) or Parallel EPROM —
In-Circuit Reconfigurability Yes —
JTAG Boundary-Scan Yes —
Operating Temperature (Industrial -N suffix) -40 °C to +85 °C —
安裝類型 Surface Mount —
Device Type — Field Programmable Gate Array (FPGA)
Logic Elements — 672
Logic Array Blocks (LABs) — 672 / 10 ≈ 67 LABs
FlipFlops — 152
Propagation Delay — 5 ns (speed grade -3)
User I/O Voltage — 3.3 V or 5 V (selectable)
User I/O Count — 152
Configuration Memory — SRAM (volatile, external configuration device required)
Configuration Devices — EPC1, EPC1213, EPC1064, EPC1441
In-System Reconfigurability — Yes (ICR via configuration device or controller)
JTAG Support — Yes (boundary-scan + configuration)
Speed Grade — -3
RoHS 狀態 — unknown

資料表與資源

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