EPF8820ARI208-2N vs EPF8820ARC208-2 比較
詳細並排比較 EPF8820ARI208-2N 由 Altera 與 EPF8820ARC208-2 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPF8820ARI208-2N | EPF8820ARC208-2 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Family | FLEX 8000 | FLEX 8000 |
| Usable Gates | 8,820 | 8,000 (typical) |
| Logic Elements | 504 | — |
| Maximum User I/O | 78 | — |
| LABs (Logic Array Blocks) | 63 | — |
| Logic Elements per LAB | 8 | — |
| Speed Grade | -2 (mid-tier) | -2 |
| 封裝 | 208-pin RQFP (Plastic Quad Flat Pack) | 208-pin RQFP / BFQFP with exposed pad |
| 安裝類型 | Surface Mount | Surface Mount |
| Core Supply Voltage | 5.0 V | — |
| 工作溫度 | 0C to +70C (commercial) / -40C to +85C (industrial) | Commercial (0 °C to +70 °C) |
| Programming Technology | SRAM (volatile, requires configuration device) | — |
| Boundary Scan | IEEE 1149.1 (JTAG) compliant | — |
| Configuration Method | Passive serial / JTAG / Altera EPC configuration device | SRAM - serial EPC device, parallel EPROM, or microcontroller |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance per specific date code] | [DATA_NEEDED: rohs_status] |
| Lead-Free | Yes (N suffix indicates lead-free assembly) | — |
| Logic Cells | — | 672 |
| Registers | — | 1,500 (max) |
| User I/O Pins | — | 152 |
| Process Technology | — | 0.42 µm CMOS |
| Supply Voltage (Core) | — | 5 V |
| I/O Voltage (MultiVolt) | — | 3.3 V or 5.0 V |
| Max Internal Frequency | — | 125 MHz |
| In-Circuit Reconfigurable | — | Yes (ICR) |
| Boundary-Scan / JTAG | — | Yes |