EPM1270TI144C5N vs EPM1270T144C4N 比較
詳細並排比較 EPM1270TI144C5N 由 Intel 與 EPM1270T144C4N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM1270TI144C5N | EPM1270T144C4N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | MAX II | MAX II |
| Device | EPM1270 | — |
| Logic Elements / Macro Cells | 980 macro cells | — |
| User I/O Count | 212 (max for device, 116 used in 144-pin package context) | — |
| Pin-to-Pin Delay (tPD) | 6.2 ns | — |
| Maximum Operating Frequency (fMAX) | 201.1 MHz | — |
| Technology Node | 0.18 µm | — |
| Core Voltage (VCCINT) | 3.0 V to 3.6 V (3.3 V typ) | — |
| I/O Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| Configuration Memory | On-chip flash (non-volatile, instant-on) | On-chip Flash (non-volatile, instant-on) |
| User Flash Memory | 8 Kbit (shared with config block) | 8 Kbit |
| 工作溫度範圍 | -40 °C to +100 °C (industrial, TI suffix) | — |
| 封裝 | 144-pin TQFP | TQFP-144 (T144) 22x22 mm |
| 安裝類型 | Surface Mount | Surface Mount |
| JTAG / ISP | Yes (IEEE 1149.1 boundary scan, in-system programmable) | — |
| RoHS 狀態 | [DATA_NEEDED: lead-free / RoHS variant not confirmed for -5N TI suffix] | — |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Logic Elements | — | 980 |
| Macro Cells | — | 980 |
| Logic Array Blocks (LABs) | — | 16 |
| User I/O Pins | — | 80 |
| Internal Core Frequency (max) | — | 247.5 MHz |
| 供應電壓 | — | 2.5 V / 3.3 V |
| I/O Standard Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V MultiVolt |
| Lead Pitch | — | 0.5 mm |
| Operating Temperature (commercial) | — | 0C to +85C |
| MSL 等級 | — | 3 (168 hours) |
| Lead-Free / RoHS | — | Yes |
| JTAG / IEEE 1149.1 | — | Supported |