EPM2210F256C5 vs EPM1270F256C5 比較
詳細並排比較 EPM2210F256C5 由 Altera 與 EPM1270F256C5 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPM2210F256C5 - MAX II CPLD 1700 Macrocells 201MHz FBGA-256 | Altera / Intel
EPM2210F256C5 Nrnd規格比較
| 參數 | EPM2210F256C5 | EPM1270F256C5 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | 啟用中 |
| Device Family | MAX II | — |
| Series | EPM2210 | MAX II |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells (Logic Elements) | 1700 | — |
| Maximum Internal Frequency | 201.1 MHz | — |
| Propagation Delay | 5 ns (C5 speed grade) | — |
| User I/Os | 272 | — |
| 供應電壓 | 2.5 V / 3.3 V (MultiVolt I/O) | — |
| Process Technology | 0.18 µm flash-based | 0.18 µm |
| 封裝 | 256-ball FineLine BGA (FBGA-256) | 256-ball FineLine BGA (FBGA-256) |
| Package Code | BGA, 17 x 17 mm, 1.0 mm pitch | — |
| 安裝類型 | Surface Mount | — |
| 工作溫度 | 0C to +85C (commercial, C5 suffix) | 0 °C to +85 °C (commercial, 'C' grade) |
| Programming Interface | JTAG (IEEE 1149.1), in-system programmable | JTAG (IEEE 1149.1) / ISP via ByteBlaster / USB-Blaster |
| Configuration Memory | On-chip flash (instant-on, non-volatile) | On-chip flash (non-volatile, instant-on) |
| On-chip User Flash Memory | 8 Kbits | — |
| RoHS 狀態 | Compliant | Compliant |
| MSL 等級 | 3 (per JEDEC J-STD-020) | — |
| Family | — | EPM1270 |
| Macro Cells | — | 980 |
| Logic Array Blocks (LABs) | — | 16 |
| Maximum User I/O Pins | — | 212 |
| Pin-to-Pin Logic Delay (tPD) | — | 6.2 ns (C5 speed grade) |
| Internal Operating Frequency | — | 201.1 MHz |
| Core Supply Voltage | — | 2.5 V / 3.3 V |
| I/O Standards Supported | — | LVCMOS/LVTTL 1.8 V, 2.5 V, 3.3 V, 5.0 V (MultiVolt) |
| User Flash Memory | — | 8 Kbits |