EPM2210F256C5 vs EPM2210F256C4N 比較
詳細並排比較 EPM2210F256C5 由 Altera 與 EPM2210F256C4N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPM2210F256C5 - MAX II CPLD 1700 Macrocells 201MHz FBGA-256 | Altera / Intel
EPM2210F256C5 Nrnd規格比較
| 參數 | EPM2210F256C5 | EPM2210F256C4N |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | 啟用中 |
| Device Family | MAX II | — |
| Series | EPM2210 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD |
| Macro Cells (Logic Elements) | 1700 | — |
| Maximum Internal Frequency | 201.1 MHz | 247.5 MHz |
| Propagation Delay | 5 ns (C5 speed grade) | — |
| User I/Os | 272 | — |
| 供應電壓 | 2.5 V / 3.3 V (MultiVolt I/O) | — |
| Process Technology | 0.18 µm flash-based | 0.18 µm |
| 封裝 | 256-ball FineLine BGA (FBGA-256) | 256-ball FineLine BGA (FBGA) |
| Package Code | BGA, 17 x 17 mm, 1.0 mm pitch | — |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| 工作溫度 | 0C to +85C (commercial, C5 suffix) | — |
| Programming Interface | JTAG (IEEE 1149.1), in-system programmable | JTAG IEEE Std. 1149.1 + ISP |
| Configuration Memory | On-chip flash (instant-on, non-volatile) | — |
| On-chip User Flash Memory | 8 Kbits | — |
| RoHS 狀態 | Compliant | Compliant |
| MSL 等級 | 3 (per JEDEC J-STD-020) | — |
| Family | — | MAX II |
| Logic Elements (LE) | — | 2210 |
| Macro Cells | — | 1700 |
| User Flash Memory | — | 204 Kbit |
| Pin-to-Pin Propagation Delay (tPD) | — | 7.0 ns |
| Maximum User I/O Pins | — | 212 (varies with package) |
| Global Clock Networks | — | 4 |
| Core Supply Voltage | — | 3.0 V to 3.6 V (3.3 V typical) |
| MultiVolt I/O Standards | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V LVTTL/LVCMOS, PCI 66 MHz |
| 工作溫度範圍 | — | 0 °C to +85 °C (Commercial) |
| Lead-Free | — | Yes |