EPM2210F324C3N vs EPM2210GF324I5 比較
詳細並排比較 EPM2210F324C3N 由 Intel 與 EPM2210GF324I5 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPM2210GF324I5 - 2210 LE MAX II CPLD, 212 I/O, FBGA-324 | Altera / Intel
EPM2210GF324I5 ✓ 啟用中規格比較
| 參數 | EPM2210F324C3N | EPM2210GF324I5 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Device Family | MAX II | — |
| Logic Elements (LE) | 2,210 | — |
| Equivalent Macrocells | 1,700 | 1,700 |
| User Flash Memory (UFM) | 8 Kbits | 8 Kbits |
| Maximum User I/Os | 272 | — |
| Pin-to-Pin Delay (tPD1) | 7 ns (commercial speed grade) | — |
| Global Clock Networks | 4 | — |
| Core Voltage | 1.8 V | — |
| MultiVolt I/O Support | 1.5 V / 1.8 V / 2.5 V / 3.0 V / 3.3 V | — |
| 封裝 | FBGA-324 (324-ball FineLine BGA, 19 x 19 mm, 1.0 mm pitch) | FBGA-324 (FineLine BGA, 19 x 19 mm, 1.0 mm pitch) |
| Configuration Memory | On-chip flash (non-volatile, instant-on) | — |
| Programming Interface | JTAG 1149.1 (in-system programmable, ISP) | JTAG (IEEE 1149.1) / ISP |
| 工作溫度 | 0C to +85C (commercial) | -40 °C to +100 °C (industrial grade, suffix I) |
| Process Technology | 6-layer-metal CMOS, flash-based | 0.18 µm 6-layer-metal flash CMOS |
| RoHS 狀態 | Lead-free (per datasheet) | Compliant (Pb-free) |
| Design Software | Quartus II / Quartus Prime (Intel FPGA) | — |
| Family | — | MAX II |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements (LEs) | — | 2,210 |
| User I/Os (max) | — | 272 |
| Propagation Delay (tPD1, max) | — | 7 ns (industrial speed grade I5) |
| Core Supply Voltage (VCCINT) | — | 1.8 V |
| I/O Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| 安裝類型 | — | Surface Mount |