EPM2210F324I8N vs EPM2210F324C3N 比較
詳細並排比較 EPM2210F324I8N 由 Altera 與 EPM2210F324C3N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM2210F324I8N | EPM2210F324C3N |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | MAX II | — |
| Device Logic Elements | 2210 LEs | — |
| User I/O Count | 272 | — |
| 封裝 | FBGA-324 (F324) | FBGA-324 (324-ball FineLine BGA, 19 x 19 mm, 1.0 mm pitch) |
| 工作溫度範圍 | -40C to +100C (Industrial, I8N) | — |
| Supply Voltage (Core) | 1.8 V | — |
| Standby Current | 25 uA typical | — |
| Propagation Delay (tPD) | [DATA_NEEDED: tPD value ns] | — |
| Clock-to-Output Time (tCO) | [DATA_NEEDED: tCO value ns] | — |
| Configuration Memory | On-chip Flash, instant-on | On-chip flash (non-volatile, instant-on) |
| User Flash Memory | [DATA_NEEDED: UFM size Kbits] | — |
| Process Technology | 0.18 micron | 6-layer-metal CMOS, flash-based |
| Number of LABs | [DATA_NEEDED: LAB count] | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, SSTL | — |
| Programming Interface | JTAG (IEEE 1149.1) | JTAG 1149.1 (in-system programmable, ISP) |
| Internal Oscillator | Yes | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | Lead-free (per datasheet) |
| MSL 等級 | [DATA_NEEDED: MSL level] | — |
| Device Family | — | MAX II |
| Logic Elements (LE) | — | 2,210 |
| Equivalent Macrocells | — | 1,700 |
| User Flash Memory (UFM) | — | 8 Kbits |
| Maximum User I/Os | — | 272 |
| Pin-to-Pin Delay (tPD1) | — | 7 ns (commercial speed grade) |
| Global Clock Networks | — | 4 |
| Core Voltage | — | 1.8 V |
| MultiVolt I/O Support | — | 1.5 V / 1.8 V / 2.5 V / 3.0 V / 3.3 V |
| 工作溫度 | — | 0C to +85C (commercial) |
| Design Software | — | Quartus II / Quartus Prime (Intel FPGA) |