EPM240GT100C4 vs EPM240GT100 比較

詳細並排比較 EPM240GT100C4 由 Altera 與 EPM240GT100 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EPM240GT100C4 EPM240GT100C4 - MAX II CPLD, 240 LE, 100-TQFP | Altera

EPM240GT100C4 - MAX II CPLD, 240 LE, 100-TQFP | Altera

EPM240GT100C4 ✓ 啟用中

規格比較

參數 EPM240GT100C4 EPM240GT100
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 啟用中 啟用中
Family MAX II MAX II
Logic Elements (LE) 240 —
Equivalent Macrocells 192 192
Pin-to-Pin Delay (tPD) 4.7 ns —
Propagation Delay 6.1 ns (max) —
User I/O Pins (max) 80 —
On-chip Flash Memory (UFM) 8 Kbits —
Process Technology 0.18-µm, 6-layer-metal flash CMOS 0.18 um, 6-layer-metal flash
封裝 100-TQFP (TQFP-100), 16 x 16 mm, 0.5 mm pitch TQFP-100 (GT suffix)
I/O Standards Supported 1.5 V, 1.8 V, 2.5 V, 3.3 V (MultiVolt) 1.8V, 2.5V, 3.3V, 5V (MultiVolt)
Programming Interface JTAG (IEEE 1149.1) / In-System Programmable (ISP) JTAG (IEEE 1149.1) / ISP
工作溫度範圍 0°C to +85°C (Commercial) —
Supply Voltage (Core) 3.3 V —
安裝類型 Surface Mount (Gull-Wing leads) Surface Mount
Lead-Free / RoHS Lead-Free (per FindIC entry); RoHS compliance [DATA_NEEDED: verify against manufacturer datasheet] —
Logic Elements (LEs) — 240
Non-Volatile Flash Memory — 8 Kbits
Maximum User I/Os — 80
Core Voltage — 3.3 V or 2.5 V
Pin-to-Pin Propagation Delay — [DATA_NEEDED: tPD value]
Operating Temperature (Commercial) — 0 C to 85 C
Operating Temperature (Industrial) — -40 C to 100 C
RoHS 狀態 — Compliant
Design Software — Quartus II / Quartus Prime Lite

資料表與資源

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