EPM240M100C4N vs EPM240ZM100C6N 比較
詳細並排比較 EPM240M100C4N 由 Intel 與 EPM240ZM100C6N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM240M100C4N | EPM240ZM100C6N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Series | MAX II | — |
| Device Family | EPM240 | — |
| Macro Cells | 192 | 192 |
| User I/Os | 80 | 80 |
| Propagation Delay (tPD) Max | 4.7 ns | — |
| Internal Operating Frequency | 247.5 MHz | — |
| Supply Voltage - Core | 2.5 V / 3.3 V | — |
| I/O Standards Supported | 1.5 V, 1.8 V, 2.5 V, 3.3 V LVCMOS/LVTTL | — |
| User Flash Memory | 8 Kbit | — |
| Programmability | In-System Programmable via JTAG (IEEE 1149.1) | — |
| Configuration Memory | Non-volatile on-chip flash (instant-on) | — |
| Logic Family | CMOS | — |
| 封裝 | 100-pin Micro FineLine BGA (MBGA), 6 x 6 mm, 0.5 mm pitch | 100-MBGA (Micro FineLine BGA), 6 × 6 mm, 0.5 mm pitch |
| 安裝類型 | Surface Mount (BGA) | Surface Mount (BGA) |
| 工作溫度 | -40 C to +125 C (industrial) | -40 °C to +125 °C |
| RoHS 狀態 | Lead Free (per DigiChip spec sheet) | — |
| Logic Array Blocks (LABs) | 4 (16 macrocells per LAB) | — |
| MultiTrack Interconnect | Yes | — |
| Hot Socketing | Yes | — |
| Family | — | MAX II |
| Logic Elements | — | 240 |
| Propagation Delay (tPD) | — | 7.5 ns |
| Max Internal Frequency | — | 184.1 MHz |
| Global Clocks | — | 4 |
| User Flash Memory (UFM) | — | 8 Kbits |
| Process Technology | — | 0.18 µm 6-layer-metal flash |
| Core Supply Voltage | — | 1.8 V |
| I/O Supply Voltages (MultiVolt) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V |
| Standby Current | — | 25 µA typical |
| Programming | — | JTAG ISP (in-system programmable) |
| Lead Free | — | Yes |